Hongshuai Zhang

Orcid: 0000-0002-4658-9426

According to our database1, Hongshuai Zhang authored at least 10 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Second-Order NS Pipelined SAR ADC With Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator.
IEEE J. Solid State Circuits, December, 2023

Bi-LSTM-Based Dynamic Prediction Model for Pulling Speed of Czochralski Single-Crystal Furnace.
J. Comput. Inf. Sci. Eng., August, 2023

A 25MHz-BW 77.2dB-SNDR 2<sup>nd</sup>-Order Gain-Error-Shaping and NS Pipelined SAR ADC Based on a Quantization-Prediction-Unrolled Scheme.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC With Code-Counter-Based Offset Calibration.
IEEE J. Solid State Circuits, 2022

2021
3D Model Registration-Based Batch Wafer-ID Recognition Algorithm.
IEEE Access, 2021

27.6 A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019
A 10-Bit 200-kS/s 1.76- $\mu$ W SAR ADC With Hybrid CAP-MOS DAC for Energy-Limited Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Nano-Watt MOS-Only Voltage Reference With High-Slope PTAT Voltage Generators.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A 10-bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018


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