Honglei Han

Orcid: 0000-0001-6630-7580

According to our database1, Honglei Han authored at least 13 papers between 2013 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Rank-1 Lattices for Efficient Path Integral Estimation.
Comput. Graph. Forum, 2021

Antagonistic Procedural Content Generation Of Sparse Reward Game.
Proceedings of the FDG'21: The 16th International Conference on the Foundations of Digital Games 2021, 2021

2020
Two-phase real-time rendering method for realistic water refraction.
Virtual Real. Intell. Hardw., 2020

Reconstructing Monte Carlo Errors as a Blue-noise in Screen Space.
Proceedings of the 28th Pacific Conference on Computer Graphics and Applications, 2020

Automatic Generation of Game Levels Based on Controllable Wave Function Collapse Algorithm.
Proceedings of the Entertainment Computing - ICEC 2020, 2020

2018
CamBridge: a bridge of camera aesthetic between virtual environment designers and players.
Proceedings of the 16th ACM SIGGRAPH International Conference on Virtual-Reality Continuum and its Applications in Industry, 2018

Immersive Visualization for Abnormal Detection in Heterogeneous Data for On-site Decision Making.
Proceedings of the 51st Hawaii International Conference on System Sciences, 2018

Player Experience Information Evaluation in 3D Virtual Environments.
Proceedings of the 31st International Conference on Computer Animation and Social Agents, 2018

2016
Efficient view selection by measuring proxy information.
Comput. Animat. Virtual Worlds, 2016

ProcPlan: A Procedural Evaluation Strategy for Tourist Attractions Planning.
Proceedings of the E-Learning and Games - 10th International Conference, 2016

Remote Rendering for Mobile Devices Literature Overview.
Proceedings of the E-Learning and Games - 10th International Conference, 2016

2014
Perception-based model simplification for motion blur rendering.
Graph. Model., 2014

2013
Efficient Algorithm for Hardware/Software Partitioning and Scheduling on MPSoC.
J. Comput., 2013


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