Honglan Zhan

Orcid: 0000-0002-2840-9639

According to our database1, Honglan Zhan authored at least 6 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2023
High-Speed and Energy-Efficient Single-Port Content Addressable Memory to Achieve Dual-Port Operation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

A Hardware-Software Cooperative Interval-Replaying for FPGA-based Architecture Evaluation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

MBAPIS: Multi-Level Behavior Analysis Guided Program Interval Selection for Microarchitecture Studies.
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2021
Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports.
IEEE J. Solid State Circuits, 2021

Cascade Current Mirror to Improve Linearity and Consistency in SRAM In-Memory Computing.
IEEE J. Solid State Circuits, 2021

2020
In-Memory Computing With Double Word Lines and Three Read Ports for Four Operands.
IEEE Trans. Very Large Scale Integr. Syst., 2020


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