Hong-Seok Choi
According to our database1,
Hong-Seok Choi
authored at least 17 papers
between 2006 and 2024.
Collaborative distances:
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Bibliography
2024
13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2021
Proceedings of the 18th International SoC Design Conference, 2021
2020
A 48 Gb/s PAM-4 Transmitter With 3-Tap FFE Based on Double-Shielded Coplanar Waveguide in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
2019
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
56Gb/s PAM-4 VCSEL Transmitter with Quarter-Rate Forwarded Clock using 65nm CMOS Circuits.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
A real-time smart fruit quality grading system classifying by external appearance and internal flavor factors.
Proceedings of the IEEE International Conference on Industrial Technology, 2018
2014
Combining histogram-wise and pixel-wise matchings for kernel tracking through constrained optimization.
Comput. Vis. Image Underst., 2014
2012
Numerical Modeling; Thickness Dependence of <i>J-V</i> Characteristic for Multi-Layered OLED Device.
IEICE Trans. Electron., 2012
Proceedings of the International Conference on Information and Communication Technology Convergence, 2012
2008
IEICE Trans. Commun., 2008
IEICE Trans. Commun., 2008
2006
IEICE Trans. Commun., 2006
IEICE Trans. Commun., 2006