Hojun Yoon

According to our database, Hojun Yoon authored at least 2 papers in 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

A 3.2-12.8Gb/s Duty-Cycle Compensating Quadrature Error Corrector for DRAM Interfaces, With Fast Locking and Low Power Characteristics.

Hojun Yoon, Wonjoo Jung, Jaewoo Park, Jindo Byun, Hyungmin Jin, Hyunyoon Cho, Youngmin Kim, Baek-Jin Lim, Young-Chul Cho, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Changsik Yoo, Sang-Hyun Lee

Proceedings of the 47th ESSCIRC 2021, 2021

A 24Gb/s/pin PAM-4 Built Out Tester chip enabling PAM-4 chips test with NRZ interface ATE.

Hyungmin Jin, Jindo Byun, Hyunyoon Cho, Hojun Yoon, Jin-Hee Park, Kyoungsoo Kim, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Sang-Hyun Lee

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021