Hoda Naghibi Jouybari

Orcid: 0000-0003-0468-3032

According to our database1, Hoda Naghibi Jouybari authored at least 15 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
WebGPU-SPY: Finding Fingerprints in the Sandbox through GPU Cache Attacks.
Proceedings of the 19th ACM Asia Conference on Computer and Communications Security, 2024

2023
Microarchitectural Attacks in Heterogeneous Systems: A Survey.
ACM Comput. Surv., 2023

Exploiting Parallel Memory Write Requests for Covert Channel Attacks in Integrated CPU-GPU Systems.
CoRR, 2023

Spy in the GPU-box: Covert and Side Channel Attacks on Multi-GPU Systems.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022
Sealer: In-SRAM AES for High-Performance and Low-Overhead Memory Encryption.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

2021
Side Channel Attacks on GPUs.
IEEE Trans. Dependable Secur. Comput., 2021

Beyond the CPU: Side-Channel Attacks on GPUs.
IEEE Des. Test, 2021

Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU Systems.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020
Security of Graphics Processing Units (GPUs) in Heterogeneous Systems.
PhD thesis, 2020

Securing Machine Learning Architectures and Systems.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019
GPUGuard: mitigating contention based side and covert channel attacks on GPUs.
Proceedings of the ACM International Conference on Supercomputing, 2019

2018
Rendered Insecure: GPU Side Channel Attacks are Practical.
Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, 2018

2017
Covert Channels on GPGPUs.
IEEE Comput. Archit. Lett., 2017

Constructing and characterizing covert channels on GPGPUs.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

2014
A low overhead, fault tolerant and congestion aware routing algorithm for 3D mesh-based Network-on-Chips.
Microprocess. Microsystems, 2014


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