Ho Joon Lee

According to our database, Ho Joon Lee authored at least 7 papers between 2011 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

Blind Source Separation for Myelin Water Fraction Mapping Using Multi-Echo Gradient Echo Imaging.

Jae Eun Song, Jaewook Shin, Hongpyo Lee, Ho Joon Lee, Won-Jin Moon, Dong-Hyun Kim

IEEE Trans. Medical Imaging, 2020

2015

A process tolerant semi-self impedance calibration method for LPDDR4 memory controller.

Ho Joon Lee, Yong-Bin Kim

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2014

Full custom implementation of a S-Box circuit architecture using power gated PLA structure.

Ho Joon Lee, Yong-Bin Kim, Kyung Ki Kim

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

An area efficient low power high speed S-Box implementation using power-gated PLA.

Ho Joon Lee, Yong-Bin Kim

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013

Low power Null Convention Logic circuit design based on DCVSL.

Ho Joon Lee, Yong-Bin Kim

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012

On-chip HBD sensor for nanoscale CMOS technology.

Ho Joon Lee, Yong-Bin Kim, Kyung Ki Kim

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011

Analysis of time dependent dielectric breakdown in nanoscale CMOS circuits.

Ho Joon Lee, Kyung Ki Kim

Proceedings of the International SoC Design Conference, 2011