Ho-Cheung Ng

Orcid: 0000-0002-5171-1318

According to our database¹, Ho-Cheung Ng authored at least 27 papers between 2013 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

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In proceedings

Article

PhD thesis

Dataset

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On csauthors.net:

Bibliography

2024

Honeycomb: Ordered Key-Value Store Acceleration on an FPGA-Based SmartNIC.

[BibT_eX]

[DOI]

Junyi Liu

Aleksandar Dragojevic

IEEE Trans. Computers, March, 2024

2023

Honeycomb: ordered key-value store acceleration on an FPGA-based SmartNIC.

[BibT_eX]

[DOI]

Junyi Liu

Aleksandar Dragojevic

CoRR, 2023

2022

Low-Latency In Situ Image Analytics With FPGA-Based Quantized Convolutional Neural Network.

[BibT_eX]

[DOI]

Maolin Wang

Kelvin C. M. Lee

Bob M. F. Chung

Sharatchandra Varma Bogaraju

IEEE Trans. Neural Networks Learn. Syst., 2022

2021

Reconfigurable Acceleration of Short Read Mapping with Biological Consideration.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020

GeDi: applying suffix arrays to increase the repertoire of detectable SNVs in tumour genomes.

[BibT_eX]

[DOI]

BMC Bioinform., 2020

Acceleration of Short Read Alignment with Runtime Reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2020

2019

Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going.

[BibT_eX]

[DOI]

George A. Constantinides

ACM Comput. Surv., 2019

Convolution Based Spectral Partitioning Architecture for Hyperspectral Image Classification.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Geoscience and Remote Sensing Symposium, 2019

Investigating the Feasibility of FPGA-based Network Switches.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018

Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2018

Memory-Efficient Architecture for Accelerating Generative Networks on FPGA.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2018

A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2018

Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development.

[BibT_eX]

[DOI]

Ho-Cheung Ng

Shuanglong Liu

Wayne Luk

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Hardware Compilation of Deep Neural Networks: An Overview.

[BibT_eX]

[DOI]

George A. Constantinides

Peter Y. K. Cheung

Wayne Luk

Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

2017

Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of efforts.

[BibT_eX]

[DOI]

Ho-Cheung Ng

Shuanglong Liu

Wayne Luk

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

A Parameterizable Activation Function Generator for FPGA-Based Neural Network Applications.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016

A Soft Processor Overlay with Tightly-coupled FPGA Accelerator.

[BibT_eX]

[DOI]

Ho-Cheung Ng

Cheng Liu

Hayden Kwok-Hay So

CoRR, 2016

High-throughput cellular imaging with high-speed asymmetric-detection time-stretch optical microscopy under FPGA platform.

[BibT_eX]

[DOI]

Ho-Cheung Ng

Maolin Wang

Bob M. F. Chung

B. Sharat Chandra Varma

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Towards FPGA-assisted spark: An SVM training acceleration case study.

[BibT_eX]

[DOI]

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Real-time object detection and classification for high-speed asymmetric-detection time-stretch optical microscopy on FPGA.

[BibT_eX]

[DOI]

Maolin Wang

Ho-Cheung Ng

Bob M. F. Chung

B. Sharat Chandra Varma

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

2015

A soft processor overlay with tightly-coupled FPGA accelerator.

[BibT_eX]

[DOI]

Ho-Cheung Ng

PhD thesis, 2015

Automatic Nested Loop Acceleration on FPGAs Using Soft CGRA Overlay.

[BibT_eX]

[DOI]

Cheng Liu

Ho-Cheung Ng

Hayden Kwok-Hay So

CoRR, 2015

QuickDough: A rapid FPGA loop accelerator design framework using soft CGRA overlay.

[BibT_eX]

[DOI]

Cheng Liu

Ho-Cheung Ng

Hayden Kwok-Hay So

Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2014

WIJAM: A Mobile Collaborative Improvisation Platform under Master-players Paradigm.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on New Interfaces for Musical Expression, 2014

2013

Direct virtual memory access from FPGA for high-productivity heterogeneous computing.

[BibT_eX]

[DOI]

Ho-Cheung Ng

Yuk-Ming Choi

Hayden Kwok-Hay So

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Ho-Cheung Ng

Timeline

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On csauthors.net:

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