Hitoshi Kunitake
Orcid: 0000-0003-1187-4590
According to our database1,
Hitoshi Kunitake
authored at least 4 papers
between 2023 and 2024.
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Bibliography
2024
Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM.
Proceedings of the IEEE International Memory Workshop, 2024
2023
1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Soft- and Hard-Error Radiation Reliability of 228 KB $3\mathrm{T}+1\mathrm{C}$ Oxide Semiconductor Memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2023