Hitoshi Abiko

According to our database1, Hitoshi Abiko authored at least 2 papers between 1994 and 1996.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1996
A GHz MOS adaptive pipeline technique using MOS current-mode logic.
IEEE J. Solid State Circuits, 1996

1994
A 500 MHz, 32 bit, 0.4 μm CMOS RISC processor.
IEEE J. Solid State Circuits, December, 1994


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