Hitesh Chawla
According to our database1,
Hitesh Chawla
authored at least 2 papers
between 2017 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
2017
2018
2019
2020
2021
2022
2023
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Bibliography
2023
A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2017
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017