Hisayuki Higuchi

According to our database, Hisayuki Higuchi authored at least 4 papers between 1989 and 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1995

A 2.6-ns wave-pipelined CMOS SRAM with dual-sensing-latch circuits.

Suguru Tachibana, Hisayuki Higuchi, Koichi Takasugi, Katsuro Sasaki, Toshiaki Yamanaka, Yoshinobu Nakagome

IEEE J. Solid State Circuits, April, 1995

1989

A 3.5-ns, 500-mW, 16-kbit BiCMOS ECL RAM.

Makoto Suzuki, Suguru Tachibana, Atsuo Watanabe, Shoji Shukuri, Hisayuki Higuchi, Takahiro Nagano, Katsuhiro Shimohigashi

IEEE J. Solid State Circuits, October, 1989

Substrate current reduction techniques for BiCMOS DRAM.

Takayuki Kawahara, Goro Kitsukawa, Hisayuki Higuchi, Yoshiki Kawajiri, Takao Watanabe, Kiyoo Itoh, Ryoichi Hori, Yutaka Kobayashi, Tetsuro Matsumoto

IEEE J. Solid State Circuits, October, 1989

An 8 ns 256 K BiCMOS RAM.

Nobuo Tamba, Shuuichi Miyaoka, Masanori Odaka, Katsumi Ogiue, Kouichirou Yamada, Takahide Ikeda, Mitsuru Hirao, Hisayuki Higuchi, Hideaki Uchida

IEEE J. Solid State Circuits, August, 1989