Hisato Fujisaka
According to our database1,
Hisato Fujisaka
authored at least 26 papers
between 1999 and 2016.
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Bibliography
2016
Study on Threshold Voltage Variation Evaluated by Charge-Based Capacitance Measurement.
IEICE Trans. Electron., 2016
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
2014
Probabilistic particle modeling of quantum wave propagation with excitation and refraction.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Probabilistic particle modeling of quantum wave propagation with reflection, transmission, and coupling.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Variable packet splitting transmission in multi-relay cooperative communications with DF and DAF for SC-FDMA.
EURASIP J. Wirel. Commun. Netw., 2013
2012
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part II: Multiplication and Algebraic Functions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Interference Cancellation Using Replica Signal for HTRCI-MIMO/OFDM in Time-Variant Large Delay Spread Longer Than Guard Interval.
J. Electr. Comput. Eng., 2012
2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
Effects of Prior Knowledge on Multi-Agent Reinforcement Leaning System to Find Courses of Ships.
Aust. J. Intell. Inf. Process. Syst., 2010
2009
Performance enhancement of TFI-OFDM with path selection based channel identification.
Digit. Signal Process., 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
2007
Proceedings of the Neural Information Processing, 14th International Conference, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Piecewise linear circuits operating on first-order multi-level and second-order binary sigma-delta modulated signals.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2004
A design of 4-operand redundant binary parallel adder using neuron MOS.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A binary-quantized pseudo-diffusion system.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
Binary and multi-valued cellular array models of linear distributed parameter systems.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
2002
Associative Memories Using Interaction between Multilayer Perceptrons and Sparsely Interconnected Neural Networks.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999