Hisanori Hamano

According to our database, Hisanori Hamano authored at least 2 papers between 1997 and 1998.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1998

A low power SRAM using auto-backgate-controlled MT-CMOS.

Koji Nii, Hiroshi Makino, Yoshiki Tsujihashi, Chikayoshi Morishima, Yasushi Hayakawa, Hiroyuki Nunogami, Takahiko Arakawa, Hisanori Hamano

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

1997

A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme.

Hiroaki Suzuki, Hiroshi Makino, Koichiro Mashiko, Hisanori Hamano

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997