Hisakazu Kotani

According to our database, Hisakazu Kotani authored at least 3 papers between 1988 and 1994.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1994

A 256-Mb DRAM with 100 MHz serial I/O ports for storage of moving pictures.

Hisakazu Kotani, Hironori Akamatsu, Yasushi Naito, Toyokazu Fujii, Tohru Iwata, Toshiaki Tsuji, Yutaka Itoh, Norisato Shimizu, Junji Hirase, Yoshiyuki Shibata, Kazuhiro Yamashita, Takashi Hori, Tsutomu Fujita

IEEE J. Solid State Circuits, November, 1994

1990

A 50-MHz 8-Mbit video RAM with a column direction drive sense amplifier.

Hisakazu Kotani, Hironori Akamatsu, Junko Matsushima, Shozo Okada, Tsuyoshi Shiragasawa, Takayoshi Yamada, Michihiro Inoue

IEEE J. Solid State Circuits, February, 1990

1988

A 4-Mbit DRAM with 16-bit concurrent ECC.

Toshio Yamada, Hisakazu Kotani, Junko Matsushima, Michihiro Inoue

IEEE J. Solid State Circuits, February, 1988