Hiroyuki Tsujikawa
According to our database1,
Hiroyuki Tsujikawa
authored at least 9 papers
between 2000 and 2006.
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Collaborative distances:
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2006
An Integrated Timing and Dynamic Supply Noise Verification for Multi-10-Million Gate SoC Designs.
IEICE Trans. Electron., 2006
2005
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
Dynamic Power-Supply and Well Noise Measurements and Analysis for Low Power Body Biased Circuits.
IEICE Trans. Electron., 2005
An integrated timing and dynamic supply noise verification for nano-meter CMOS SoC designs.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
Full-chip vectorless dynamic power integrity analysis and verification against 100uV/100ps-resolution measurement.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
2003
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
2000
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000