Hiroyuki Tsuchiya

According to our database1, Hiroyuki Tsuchiya authored at least 7 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
3D-Stacked 1Megapixel Time-Gated SPAD Image Sensor with 2D Interactive Gating Network for Image Alignment-Free Sensor Fusion.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2022
A 0.37W 143dB-Dynamic-Range 1Mpixel Backside-Illuminated Charge-Focusing SPAD Image Sensor with Pixel-Wise Exposure Control and Adaptive Clocked Recharging.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2017
Experimental results of reconfigurable non-binary cyclic ADC.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

The design of a 14-bit 400kSPS non-binary pipeline cyclic ADC.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique.
Proceedings of the 2017 International Symposium on Intelligent Signal Processing and Communication Systems, 2017

A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Non-binary cyclic ADC with correlated level shifting technique.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017


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