Hiroyuki Tomiyama

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems.

[BibT_eX]

[DOI]

Hideki Takase

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

Rainbow: An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Hardware multitasking in dynamically partially reconfigurable FPGA-based embedded systems.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2011

Fast design space exploration for mixed hardware-software embedded systems.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2011

An integrated optimization framework for reducing the energy consumption of embedded real-time applications.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating.

[BibT_eX]

[DOI]

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Checkpoint Extraction Using Execution Traces for Intra-task DVFS in Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Sixth IEEE International Symposium on Electronic Design, 2011

2010

Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation.

[BibT_eX]

[DOI]

IPSJ Trans. Syst. LSI Des. Methodol., 2010

Static Task Scheduling Algorithms Based on Greedy Heuristics for Battery-Powered DVS Systems.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2010

Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

Automatic communication synthesis with hardware sharing for design space exploration.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A Novel Mechanism for Effective Hardware Task Preemption in Dynamically Reconfigurable Systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010

Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems.

[BibT_eX]

[DOI]

Hideki Takase

Proceedings of the Design, Automation and Test in Europe, 2010

Minimizing inter-task interferences in scratch-pad memory usage for reducing the energy consumption of multi-task systems.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Compilers, 2010

2009

Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis.

[BibT_eX]

[DOI]

J. Inf. Process., 2009

A Generalized Framework for Energy Savings in Hard Real-Time Embedded Systems.

[BibT_eX]

[DOI]

IPSJ Trans. Syst. LSI Des. Methodol., 2009

Partitioning and Allocation of Scratch-Pad Memory in Priority-Based Multi-Task Systems.

[BibT_eX]

[DOI]

Hideki Takase

IPSJ Trans. Syst. LSI Des. Methodol., 2009

Effective Scheduling Algorithms for I/O Blocking with a Multi-Frame Task Model.

[BibT_eX]

[DOI]

Shan Ding

IEICE Trans. Inf. Syst., 2009

Practical Energy-Aware Scheduling for Real-Time Multiprocessor Systems.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2009

Heuristics for Static Voltage Scheduling Algorithms on Battery-Powered DVS Systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Software and Systems, 2009

Analyzing and optimizing energy efficiency of algorithms on DVS systems a first step towards algorithmic energy minimization.

[BibT_eX]

[DOI]

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Dynamic Power Management for Embedded System Idle State in the Presence of Periodic Interrupt Services.

[BibT_eX]

[DOI]

IPSJ Trans. Syst. LSI Des. Methodol., 2008

Embedded System Covalidation with RTOS Model and FPGA.

[BibT_eX]

[DOI]

IPSJ Trans. Syst. LSI Des. Methodol., 2008

High-Level Synthesis of Software Function Calls.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

An Effective GA-Based Scheduling Algorithm for FlexRay Systems.

[BibT_eX]

[DOI]

Shan Ding

IEICE Trans. Inf. Syst., 2008

Energy efficiency of scratch-pad memory in deep submicron domains: an empirical study.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2008

CHStone: A benchmark program suite for practical C-based high-level synthesis.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Energy Efficiency of Scratch-Pad Memory at 65 nm and Below: An Empirical Study.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Software and Systems, 2008

A Generalized Framework for System-Wide Energy Savings in Hard Real-Time Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE/IPIP International Conference on Embedded and Ubiquitous Computing (EUC 2008), 2008

Improved Policies for Drowsy Caches in Embedded Processors.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2007

Practice and analysis of an extension course for training trainers of embedded software.

[BibT_eX]

[DOI]

SIGBED Rev., 2007

Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

Function Call Optimization for Efficient Behavioral Synthesis.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

Scheduling Algorithms for I/O Blockings with a Multi-frame Task Model.

[BibT_eX]

[DOI]

Shan Ding

Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 2007

Power Optimization for Embedded System Idle Time in the Presence of Periodic Interrupt Services.

[BibT_eX]

[DOI]

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Behavioral Synthesis of Double-Precision Floating-Point Adders with Function-Level Transformations: A Case Study.

[BibT_eX]

[DOI]

Proceedings of the Embedded Software and Systems, [Third] International Conference, 2007

A Hardware/Software Cosimulator with RTOS Supports for Multiprocessor Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Embedded Software and Systems, [Third] International Conference, 2007

Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis.

[BibT_eX]

[DOI]

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

A Software Framework for Energy and Performance Tradeoff in Fixed-Priority Hard Real-Time Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2007

RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip.

[BibT_eX]

[DOI]

Shinya Honda

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Function Call Optimization in Behavioral Synthesis.

[BibT_eX]

[DOI]

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2005

NEXCESS: Nagoya university extension courses for embedded software specialists.

[BibT_eX]

[DOI]

SIGBED Rev., 2005

An RTOS-Based Design and Validation Methodology for Embedded Systems.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2005

An Efficient Search Algorithm of Worst-Case Cache Flush Timings.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 2005

Cosimulation of ITRON-based embedded software with SystemC.

[BibT_eX]

[DOI]

Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

A GA-based scheduling method for FlexRay systems.

[BibT_eX]

[DOI]

Proceedings of the EMSOFT 2005, 2005

2004

ILP-Based Program Path Analysis for Bounding Worst-Case Inter-Task Cache Conflicts.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2004

RTOS-centric hardware/software cosimulator for embedded system design.

[BibT_eX]

[DOI]

Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

2003

Towards Automatic Validation of Dynamic Behavior in Pipelined Processor Specifications.

[BibT_eX]

[DOI]

Prabhat Mishra

Des. Autom. Embed. Syst., 2003

Data Organization Exploration for Low-Energy Address Buses.

[BibT_eX]

Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003

2002

Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language.

[BibT_eX]

[DOI]

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units.

[BibT_eX]

[DOI]

Proceedings of the 2002 Design, 2002

2001

Satisfying Timing Constraints of Preemptive Real-Time Tasks through Task Layout Technique.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

New directions in compiler technology for embedded systems (embedded tutorial).

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2001, 2001

2000

Verification of in-order execution in pipelined processors.

[BibT_eX]

[DOI]

Taisei Yoshino

Proceedings of the IEEE International High-Level Design Validation and Test Workshop 2000, 2000

Program path analysis to bound cache-related preemption delay in preemptive real-time systems.

[BibT_eX]

[DOI]

Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

1998

Embedded System Design Using Soft-Core Processor and Valen-C.

[BibT_eX]

[DOI]

J. Inf. Sci. Eng., 1998

Statistical Performance-Driven Module Binding in High-Level Synthesis.

[BibT_eX]

[DOI]

Akihiko Inoue

Proceedings of the 11th International Symposium on System Synthesis, 1998

Instruction Encoding Techniques for Area Minimization of Instruction ROM.

[BibT_eX]

[DOI]

Proceedings of the 11th International Symposium on System Synthesis, 1998

Instruction Scheduling for Power Reduction in Processor-Based System Design.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

Module Selection Using Manufacturing Information.

[BibT_eX]

[DOI]

Proceedings of the ASP-DAC '98, 1998

1997

Code placement techniques for cache miss rate reduction.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 1997

Memory-CPU Size Optimization for Embedded System Designs.

[BibT_eX]

[DOI]

Proceedings of the 34st Conference on Design Automation, 1997

1996

Size-Constrained Code Placement for Cache Miss Rate Reduction.

[BibT_eX]

[DOI]

Proceedings of the 9th International Symposium on System Synthesis, 1996

Optimal Code Placement of Embedded Software for Instruction Caches.

[BibT_eX]

[DOI]