Hiroyuki Takizawa
Orcid: 0000-0003-2858-3140
According to our database1,
Hiroyuki Takizawa
authored at least 156 papers
between 1999 and 2025.
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Bibliography
2025
Performance evaluation of the LBM simulations in fluid dynamics on SX-Aurora TSUBASA vector engine.
Comput. Phys. Commun., 2025
2024
CCF Trans. High Perform. Comput., August, 2024
Reuse distance-based shared LLC management mechanism for heterogeneous CPU-GPU systems.
IEICE Electron. Express, 2024
Leveraging Hardware Performance Counters for Predicting Workload Interference in Vector Supercomputers.
CoRR, 2024
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024
Modernizing an Operational Real-Time Tsunami Simulator to Support Diverse Hardware Platforms.
Proceedings of the IEEE International Conference on Cluster Computing, 2024
2023
Efficient Pause Location Prediction Using Quantum Annealing Simulations and Machine Learning.
IEEE Access, 2023
Proceedings of the High Performance Computing - 38th International Conference, 2023
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023
Balancing exploitation and exploration in parallel Bayesian optimization under computing resource constraint.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023
2022
IEICE Trans. Inf. Syst., 2022
mdx: A Cloud Platform for Supporting Data Science and Cross-Disciplinary Research Collaborations.
CoRR, 2022
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022
An Advantage Actor-Critic Deep Reinforcement Learning Method for Power Management in HPC Systems.
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2022
Toward Building a Digital Twin of Job Scheduling and Power Management on an HPC System.
Proceedings of the Job Scheduling Strategies for Parallel Processing, 2022
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
Proceedings of the HPC Asia 2022: International Conference on High Performance Computing in Asia-Pacific Region, Virtual Event, Japan, January 12, 2022
Proceedings of the 29th IEEE International Conference on High Performance Computing, 2022
A SYCL-based high-level programming framework for HPC programmers to use remote FPGA clusters.
Proceedings of the HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9, 2022
mdx: A Cloud Platform for Supporting Data Science and Cross-Disciplinary Research Collaborations.
Proceedings of the IEEE Intl. Conf. on Dependable, 2022
2021
Parallel Comput., 2021
Preemptive Parallel Job Scheduling for Heterogeneous Systems Supporting Urgent Computing.
IEEE Access, 2021
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2021
Evaluating the Performance and Conformance of a SYCL Implementation for SX-Aurora TSUBASA.
Proceedings of the Parallel and Distributed Computing, Applications and Technologies, 2021
Proceedings of the 12th International Symposium on Parallel Architectures, 2021
Portability of Vectorization-aware Performance Tuning Expertise across System Generations.
Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021
Proceedings of the Ninth International Symposium on Computing and Networking, 2021
Proceedings of the HPC Asia 2021: The International Conference on High Performance Computing in Asia-Pacific Region, 2021
2020
Proceedings of the Software for Exascale Computing - SPPEXA 2016-2019, 2020
Supercomput. Front. Innov., 2020
Online MPI Process Mapping for Coordinating Locality and Memory Congestion on NUMA Systems.
Supercomput. Front. Innov., 2020
Xevolver: A code transformation framework for separation of system-awareness from application codes.
Concurr. Comput. Pract. Exp., 2020
DeLoc: A Locality and Memory-Congestion-Aware Task Mapping Method for Modern NUMA Systems.
IEEE Access, 2020
Proceedings of the 2020 IEEE/ACM Performance Modeling, 2020
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020
Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020
Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020
Proceedings of the Eighth International Symposium on Computing and Networking, 2020
Proceedings of the 2020 IEEE International Conference on Big Data (IEEE BigData 2020), 2020
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020
2019
Performance Evaluation of Different Implementation Schemes of an Iterative Flow Solver on Modern Vector Machines.
Supercomput. Front. Innov., 2019
IEICE Trans. Inf. Syst., 2019
Proceedings of the 2019 IEEE/ACM Workshop on Education for High-Performance Computing, 2019
Proceedings of the 20th International Conference on Parallel and Distributed Computing, 2019
An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems.
Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2019
The Impacts of Locality and Memory Congestion-aware Thread Mapping on Energy Consumption of Modern NUMA Systems.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019
2018
A Machine Learning-Based Approach for Selecting SpMV Kernels and Matrix Storage Formats.
IEICE Trans. Inf. Syst., 2018
Use of Code Structural Features for Machine Learning to Predict Effective Optimizations.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018
Proceedings of the Sixth International Symposium on Computing and Networking, 2018
Investigating the Effects of Dynamic Thread Team Size Adjustment for Irregular Applications.
Proceedings of the Sixth International Symposium on Computing and Networking, 2018
Proceedings of the International Conference on Field-Programmable Technology, 2018
A Failure Prediction-Based Adaptive Checkpointing Method with Less Reliance on Temperature Monitoring for HPC Applications.
Proceedings of the IEEE International Conference on Cluster Computing, 2018
Proceedings of the IEEE International Conference on Big Data (IEEE BigData 2018), 2018
Performance Estimation of Deeply Pipelined Fluid Simulation on Multiple FPGAs with High-speed Communication Subsystem.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018
2017
Potential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE.
J. Supercomput., 2017
Int. J. Netw. Comput., 2017
A Directive Generation Approach to High Code-Maintainability for Various HPC Systems.
Int. J. Netw. Comput., 2017
IEICE Trans. Inf. Syst., 2017
Optimizing Energy Consumption on HPC Systems with a Multi-Level Checkpointing Mechanism.
Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
An Application-Level Incremental Checkpointing Mechanism with Automatic Parameter Tuning.
Proceedings of the Fifth International Symposium on Computing and Networking, 2017
Proceedings of the Fifth International Symposium on Computing and Networking, 2017
Proceedings of the 24th IEEE International Conference on High Performance Computing, 2017
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017
2016
Int. J. Netw. Comput., 2016
Translation of Large-Scale Simulation Codes for an OpenACC Platform Using the Xevolver Framework.
Int. J. Netw. Comput., 2016
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016
The Importance of Dynamic Load Balancing among OpenMP Thread Teams for Irregular Workloads.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016
Xevdriver: A Software System Supporting XML-based Source-to-Source Code Transformations on Fortran Programs.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016
Proceedings of the Fourth International Symposium on Computing and Networking, 2016
A User-Defined Code Transformation Approach to Overlapping MPI Communication with Computation.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016
Proceedings of the 2016 IEEE Symposium in Low-Power and High-Speed Chips, 2016
2015
Sci. Program., 2015
Identification and Elimination of Platform-Specific Code Smells in High Performance Computing Applications.
Int. J. Netw. Comput., 2015
IEICE Trans. Electron., 2015
IEICE Trans. Inf. Syst., 2015
Proceedings of the Third International Symposium on Computing and Networking, 2015
Migration of an Atmospheric Simulation Code to an OpenACC Platform Using the Xevolver Framework.
Proceedings of the Third International Symposium on Computing and Networking, 2015
Proceedings of the Third International Symposium on Computing and Networking, 2015
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015
2014
MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications.
IEICE Trans. Inf. Syst., 2014
Proceedings of the High Performance Computing for Computational Science - VECPAR 2014 - 11th International Conference, Eugene, OR, USA, June 30, 2014
A Compiler-Assisted OpenMP Migration Method Based on Automatic Parallelizing Information.
Proceedings of the Supercomputing - 29th International Conference, 2014
An Approach to Customization of Compiler Directives for Application-Specific Code Transformations.
Proceedings of the IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, 2014
A Platform-Specific Code Smell Alert System for High Performance Computing Applications.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014
Xevolver: An XML-based code translation framework for supporting HPC application migration.
Proceedings of the 21st International Conference on High Performance Computing, 2014
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014
Proceedings of the 2014 International 3D Systems Integration Conference, 2014
2013
A Capacity-Aware Thread Scheduling Method Combined with Cache Partitioning to Reduce Inter-Thread Cache Conflicts.
IEICE Trans. Inf. Syst., 2013
Balanced Ternary Quantum Voltage Generator Based on Zero Crossing Shapiro Steps in Asymmetric Two-Junction SQUIDs.
IEICE Trans. Electron., 2013
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Design and evaluation of a media-oriented vector processor with a multi-banked cache memory.
Proceedings of the 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2013
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013
2012
Poster: Exploring Design Space of a 3D Stacked Vector Cache - Designing a 3D Stacked Vector Cache using Conventional EDA Tools.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012
Proceedings of the 2012 SC Companion: High Performance Computing, 2012
Proceedings of the 19th IEEE International Conference on Image Processing, 2012
Proceedings of the 2012 IEEE Symposium on Low-Power and High-Speed Chips, 2012
Proceedings of the Computing Frontiers Conference, CF'12, 2012
Proceedings of the Computing Frontiers Conference, CF'12, 2012
2011
Trans. High Perform. Embed. Archit. Compil., 2011
A Self-Organized Overlay Network Management Mechanism for Heterogeneous Environments.
J. Inf. Process., 2011
IEICE Trans. Inf. Syst., 2011
A History-Based Performance Prediction Model with Profile Data Classification for Automatic Task Allocation in Heterogeneous Computing Systems.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2011
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
2010
Proceedings of the Tenth Annual International Symposium on Applications and the Internet, 2010
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the Facing the Multicore-Challenge, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the IEEE International Conference on 3D System Integration, 2010
Proceedings of the IEEE International Conference on 3D System Integration, 2010
Proceedings of the Software Automatic Tuning, From Concepts to State-of-the-Art Results, 2010
2009
Int. J. Grid High Perform. Comput., 2009
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2009
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009
Performance tuning and analysis of future vector processors based on the roofline model.
Proceedings of the 10th workshop on MEmory performance, 2009
Proceedings of the IEEE International Conference on 3D System Integration, 2009
2008
Proceedings of the 2008 International Symposium on Applications and the Internet, 2008
Consideration of Resource Access History for Optimizing Overlay Networks in P2P-Based Resource Discovery.
Proceedings of the 2008 International Symposium on Applications and the Internet, 2008
Proceedings of the 9th workshop on MEmory performance, 2008
Proceedings of the 9th workshop on MEmory performance, 2008
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2008
Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2008
Implementation and evaluation of a distributed and cooperative load-balancing mechanism for dependable volunteer computing.
Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008
Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September, 2008
Proceedings of the High Performance Computing on Vector Systems 2008, 2008
2007
Neural Networks, 2007
Proceedings of the 2007 workshop on MEmory performance, 2007
A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs.
Proceedings of the 2007 workshop on MEmory performance, 2007
2006
Hierarchical parallel processing of large scale data clustering on a PC cluster with GPU co-processing.
J. Supercomput., 2006
Evaluating Computational Performance of Backpropagation Learning on Graphics Hardware.
Proceedings of the Irish Conference on the Mathematical Foundations of Computer Science and Information Technology, 2006
Proceedings of the 2006 International Symposium on Applications and the Internet Workshops (SAINT 2006 Workshops), 2006
Design and Implementation of an Efficient Search Mechanism Based on the Hybrid P2P Model for Ubiquitous Computing Systems.
Proceedings of the 2006 International Symposium on Applications and the Internet (SAINT 2006), 2006
Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications.
Proceedings of the Parallel and Distributed Processing and Applications, 2006
Proceedings of the 5th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2006) and 1st IEEE/ACIS International Workshop on Component-Based Software Engineering, 2006
2005
SIGARCH Comput. Archit. News, 2005
A Self-Organizing Overlay Network to Exploit the Locality of Interests for Effective Resource Discovery in P2P Systems.
Proceedings of the 2005 IEEE/IPSJ International Symposium on Applications and the Internet (SAINT 2005), 31 January, 2005
Proceedings of the Parallel and Distributed Processing and Applications, 2005
An Incremental Photon-Mapping Algorithm for Fast Walk-Through Animations.
Proceedings of the Eighth IASTED International Conference on Computer Graphics and Imaging, 2005
2004
Parallel Comput., 2004
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004
Multi-grain Parallel Processing of Data-Clustering on Programmable Graphics Hardware.
Proceedings of the Parallel and Distributed Processing and Applications, 2004
2003
A Comparison Study of Vector Quantization Codebook Design Algorithms based on the Equidistortion Principle.
Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003
A Decision Criterion to Relocate Codewords for Adaptive Vector Quantization.
Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003
2002
Parallel Algorithm for the Law-of-the-Jungle Learning to the Fast Design of Optimal Codebooks.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002
1999
A self-organizing network system forming memory from nonstationary probability distributions.
Proceedings of the International Joint Conference Neural Networks, 1999