Hiroyuki Takano

According to our database, Hiroyuki Takano authored at least 9 papers between 1996 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Optimal Spacecraft Transfer Orbit Design Using DRL Algorithm.

Ryo Endo, Isao Yamaguchi, Takeshi Yamasaki, Hiroyuki Takano

Proceedings of the 61st IEEE Annual Conference of the Society of Instrument and Control Engineers, 2022

2019

Sliding-Mode-Based Disturbance-Compensated Rendezvous Guidance with Reaching Mode Consideration.

Saori Nakagawa, Takeshi Yamasaki, Hiroyuki Takano, Isao Yamaguchi

Proceedings of the 2019 American Control Conference, 2019

2018

Uncertain System Lag-Compensated Rendezvous Guidance.

Yohei Shiraishi, Takeshi Yamasaki, Hiroyuki Takano, Isao Yamaguchi

Proceedings of the 57th IEEE Conference on Decision and Control, 2018

2017

Disturbance-compensated intercept guidance using line-of-sight rate information.

Saori Nakagawa, Takeshi Yamasaki, Hiroyuki Takano, Isao Yamaguchi

Proceedings of the 11th Asian Control Conference, 2017

2015

Sliding mode-based intercept guidance with uncertainty and disturbance compensation.

Takeshi Yamasaki, S. N. Balakrishnan, Hiroyuki Takano, Isao Yamaguchi

J. Frankl. Inst., 2015

2012

Integrated guidance and autopilot design for a chasing UAV via high-order sliding modes.

Takeshi Yamasaki, S. N. Balakrishnan, Hiroyuki Takano

J. Frankl. Inst., 2012

Integrated guidance and autopilot for a path-following UAV via high-order sliding modes.

Takeshi Yamasaki, S. N. Balakrishnan, Hiroyuki Takano

Proceedings of the American Control Conference, 2012

2011

Sliding mode based integrated guidance and autopilot for chasing UAV with the concept of time-scaled dynamic inversion.

Takeshi Yamasaki, S. N. Balakrishnan, Hiroyuki Takano

Proceedings of the American Control Conference, 2011

1996

A Shared-Bus Control Mechanism and a Cache Coherence Protocol for a High-Performance On-Chip Multiprocessor.

Masafumi Takahashi, Hiroyuki Takano, Emi Kaneko, Seigo Suzuki

Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996