Hiroyuki Nakahira

According to our database, Hiroyuki Nakahira authored at least 4 papers between 1993 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2004

A 0.13um CMOS ultra-compact DVD SoC employing a full digital equalizing PRML read channel.

Kouichi Nagano, Koji Okamoto, Akira Yamamoto, Hiroki Mouri, Akira Kawabe, Hirokuni Fujiyama, Takashi Morie, Hiroyuki Nakahira, Masahiro Kuramochi, Minoru Ochiai, Kazutoshi Aida, Youichi Ogura, Toshihiko Takahashi, Toru Kakiage, Masao Takiguchi, Takashi Yamamoto, Hiroshi Kamiyama, Yutaka Katabe

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

A fully integrated 0.13-μm CMOS mixed-signal SoC for DVD player applications.

Koji Okamoto, Takashi Morie, Akira Yamamoto, Kouichi Nagano, Koji Sushihara, Hiroyuki Nakahira, Ryusuke Horibe, Kazutoshi Aida, Toshihiko Takahashi, Minoru Ochiai, Akinobu Soneda, Toru Kakiage, Tamaki Iwasaki, Hiroshi Taniuchi, Tadashi Shibata, Takahiro Ochi, Masao Takiguchi, Takashi Yamamoto, Tadayoshi Seike, Akira Matsuzawa

IEEE J. Solid State Circuits, 2003

1994

Quantizer neuron model and neuroprocessor-named quantizer neuron chip.

Susumu Maruno, Toshiyuki Kohda, Hiroyuki Nakahira, Shiro Sakiyama, Masakatsu Maruyama

IEEE J. Sel. Areas Commun., 1994

1993

An image processing system using Image Signal Multiprocessors (ISMPs).

Hiroyuki Nakahira, Masakatsu Maruyama, Hideshi Ueda, Haruyasu Yamada

J. VLSI Signal Process., 1993