Hirotaka Furukawa
According to our database1,
Hirotaka Furukawa
authored at least 2 papers
between 2006 and 2023.
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Bibliography
2023
A Layout Area Reduction of Basic Logic Element by Using a Neuron CMOS Type 4-input Variable Logic Circuit.
Proceedings of the IEEE Region 10 Conference, 2023
2006
Proceedings of the IEEE International Conference on Systems, 2006