Hiroshi Miyanaga

According to our database, Hiroshi Miyanaga authored at least 3 papers between 1986 and 1991.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1991

A real-time 256×256 point two-dimensional FFT single-chip processor.

Hiroshi Miyanaga, Hironori Yamauchi, Kazuhiro Matsuda

Proceedings of the 1991 International Conference on Acoustics, 1991

1987

High-Speed Time Division Switch for 32-Mbit/s Bearer Rate Signals.

Naoaki Yamanaka, Hiroshi Miyanaga, Yousuke Yamamoto

IEEE J. Sel. Areas Commun., 1987

1986

A Novel Concept for High-Speed Time Switch Approaching Memory Read Cycle Limit.

Yousuke Yamamoto, Hiroshi Miyanaga, Yoshiji Kobayashi, Yasukazu Terada, Naoaki Yamanaka

IEEE Trans. Commun., 1986