Hiroshi Kodama

According to our database, Hiroshi Kodama authored at least 7 papers between 2004 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

A 30-MHz-2.4-GHz CMOS Receiver With Integrated RF Filter and Dynamic-Range-Scalable Energy Detector for Cognitive Radio Systems.

Masaki Kitsunezuka, Hiroshi Kodama, Naoki Oshima, Kazuaki Kunihiro, Tadashi Maeda, Muneo Fukaishi

IEEE J. Solid State Circuits, 2012

2010

Realization of Direct Manipulation for Visually Impaired on Touch Panel Interface.

Tatuso Nishizawa, Daisuke Nagasaka, Hiroshi Kodama, Masami Hashimoto, Kazunori Itoh, Seiji Miyaoka

Proceedings of the Computers Helping People with Special Needs, 2010

2009

A 2.88Gb/s digital hopping UWB transceiver.

Akio Tanaka, Keiichi Numata, Hiroshi Kodama, Hiromu Ishikawa, Naoki Oshima, Hitoshi Yano

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007

Wide Lock-Range, Low Phase-Noise PLL using Interpolative Ring-VCO with Coarse Frequency Tuning and Frequency Linearization.

Hiroshi Kodama, Hiroyuki Okada, Hiromu Ishikawa, Akio Tanaka

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

A 1.1V 3.1-to-9.5GHz MB-OFDM UWB transceiver in 90nm CMOS.

Akio Tanaka, Hiroyuki Okada, Hiroshi Kodama, Hiromu Ishikawa

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

RF-CMOS Implementation of UWB Transceivers and Its Application to Video Transmission.

Akifumi Kasamatsu, Akio Tanaka, Hiroshi Kodama, Satoru Tanoi, Yasuhiro Kaizaki, Juichi Nakada, Masami Hagio, Yoshiaki Kuraishi, Keren Li, Hitoshi Utagawa, Toshiaki Matsui, Ryuji Kohno

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

2004

Frequency-hopping vernier clock generators for multiple clock domain SoCs.

Hiroshi Kodama, Masayuki Mizuno, Koichi Nose, Akio Tanaka

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004