Hironori Kasahara
Orcid: 0000-0001-7984-756X
According to our database1,
Hironori Kasahara
authored at least 82 papers
between 1985 and 2023.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2017, "For contributions to multicore architectures and power reducing parallelizing compilers".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Proceedings of the IEEE John Vincent Atanasoff International Symposium on Modern Computing, 2023
2022
Parallelizing Factory Automation Ladder Programs by OSCAR Automatic Parallelizing Compiler.
Proceedings of the Languages and Compilers for Parallel Computing, 2022
2021
OSCAR Parallelizing and Power Reducing Compiler and API for Heterogeneous Multicores : (Invited Paper).
Proceedings of the IEEE/ACM Programming Environments for Heterogeneous Computing, 2021
Performance Evaluation of OSCAR Multi-target Automatic Parallelizing Compiler on Intel, AMD, Arm and RISC-V Multicores.
Proceedings of the Languages and Compilers for Parallel Computing, 2021
Proceedings of the Ninth International Symposium on Computing and Networking, 2021
2020
IEICE Trans. Electron., 2020
IEICE Trans. Electron., 2020
2019
Guest Editorial: Special Issue on Network and Parallel Computing for Emerging Architectures and Applications.
Int. J. Parallel Program., 2019
Cascaded DMA Controller for Speedup of Indirect Memory Access in Irregular Applications.
Proceedings of the 9th IEEE/ACM Workshop on Irregular Applications: Architectures and Algorithms, 2019
Performance of Static and Dynamic Task Scheduling for Real-Time Engine Control System on Embedded Multicore Processor.
Proceedings of the Languages and Compilers for Parallel Computing, 2019
Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019
2018
2017
Proceedings of the Languages and Compilers for Parallel Computing, 2017
Proceedings of the 2017 IEEE Symposium in Low-Power and High-Speed Chips, 2017
Proceedings of the 41st IEEE Annual Computer Software and Applications Conference, 2017
Proceedings of the 41st IEEE Annual Computer Software and Applications Conference, 2017
2016
Android Video Processing System Combined with Automatically Parallelized and Power Optimized Code by OSCAR Compiler.
J. Inf. Process., 2016
Proceedings of the 3rd International Workshop on Software Engineering for Parallel Systems, 2016
Proceedings of the 14th ACM International Symposium on Mobility Management and Wireless Access, 2016
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016
Proceedings of the Languages and Compilers for Parallel Computing, 2016
2015
Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems, 2015
Multigrain Parallelization for Model-Based Design Applications Using the OSCAR Compiler.
Proceedings of the Languages and Compilers for Parallel Computing, 2015
Coarse Grain Task Parallelization of Earthquake Simulator GMS Using OSCAR Compiler on Various Cc-NUMA Servers.
Proceedings of the Languages and Compilers for Parallel Computing, 2015
2014
Evaluation of Automatic Power Reduction with OSCAR Compiler on Intel Haswell and ARM Cortex-A9 Multicores.
Proceedings of the Languages and Compilers for Parallel Computing, 2014
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014
2013
Reconciling application power control and operating systems for optimal power and performance.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013
Proceedings of the Languages and Compilers for Parallel Computing, 2013
Proceedings of the 16th IEEE International Conference on Computational Science and Engineering, 2013
Parallelization of automotive engine control software on embedded multi-core processor using OSCAR compiler.
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013
Automatic parallelization, performance predictability and power control for mobile-applications.
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013
2012
Int. J. Intell. Games Simul., 2012
2011
Trans. High Perform. Embed. Archit. Compil., 2011
A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core.
IEICE Trans. Electron., 2011
Evaluation of Power Consumption at Execution of Multiple Automatically Parallelized and Power Controlled Media Applications on the RP2 Low-Power Multicore.
Proceedings of the Languages and Compilers for Parallel Computing, 2011
2010
Parallelizing Compiler Framework and API for Power Reduction and Software Productivity of Real-Time Heterogeneous Multicores.
Proceedings of the Languages and Compilers for Parallel Computing, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
OSCAR API for Real-Time Low-Power Multicores and Its Performance on Multicores and SMP Servers.
Proceedings of the Languages and Compilers for Parallel Computing, 2009
Proceedings of the ICPP 2009, 2009
Proceedings of the 2009 International Conference on Complex, 2009
2008
IEEE J. Solid State Circuits, 2008
An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Parallelization with Automatic Parallelizing Compiler Generating Consumer Electronics Multicore API.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
Proceedings of the Languages and Compilers for Parallel Computing, 2007
A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2005
Proceedings of the Languages and Compilers for Parallel Computing, 2005
Proceedings of the High-Performance Computing - 6th International Symposium, 2005
Proceedings of the 9th Annual Workshop on Interaction between Compilers and Computer Architectures, 2005
2004
Selective inline expansion for improvement of multi grain parallelism.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2004
Proceedings of the Languages and Compilers for High Performance Computing, 2004
2003
Int. J. Parallel Program., 2003
Cache Optimization for Coarse Grain Task Parallel Processing Using Inter-Array Padding.
Proceedings of the Languages and Compilers for Parallel Computing, 2003
2002
Multigrain Automatic Parallelization in Japanese Millennium Project IT21 Advanced Parallelizing Compiler.
Proceedings of the 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 2002
Proceedings of the Languages and Compilers for Parallel Computing, 15th Workshop, 2002
2001
Coarse Grain Task Parallel Processing with Cache Optimization on Shared Memory Multiprocessor.
Proceedings of the Languages and Compilers for Parallel Computing, 2001
2000
Performance Evaluation of Minimum Execution Time Multiprocessor Scheduling Algorithms Using Standard Task Graph Set.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000
Proceedings of the Languages and Compilers for Parallel Computing, 2000
Coarse-Grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler.
Proceedings of the High Performance Computing, Third International Symposium, 2000
1998
A Data-Localization Compilation Scheme Using Partial-Static Task Assignment for Fortran Coarse-Grain Parallel Processing.
Parallel Comput., 1998
Proceedings of the Job Scheduling Strategies for Parallel Processing, 1998
1996
Proceedings of the Languages and Compilers for Parallel Computing, 1996
Data-Localization for Fortran Macro-Dataflow Computation Using Partial Static Task Assignment.
Proceedings of the 10th international conference on Supercomputing, 1996
1992
A parallel optimization algorithm for minimum execution-time multiprocessor scheduling problem.
Syst. Comput. Jpn., 1992
Proceedings of the Parallel Computation Systems for Robotics: Algorithms and Architectures, 1992
1991
Syst. Comput. Jpn., 1991
Syst. Comput. Jpn., 1991
A Multi-Grain Parallelizing Compilation Scheme for OSCAR (Optimally Scheduled Advanced Multiprocessor).
Proceedings of the Languages and Compilers for Parallel Computing, 1991
Parallel Processing of Sparse Matrix Solution Using Fine Grain Tasks on OSCAR.
Proceedings of the International Conference on Parallel Processing, 1991
1990
Parallel processing of robot arm dynamic control computation on multimicroprocessors.
Microprocess. Microsystems, 1990
Parallel processing of near fine grain tasks using static scheduling OSCAR (optimally scheduled advanced multiprocessor).
Proceedings of the Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, 1990
A Compilation Scheme for Macro-Dataflow Computation on Hierarchical Multiprocessor Systems.
Proceedings of the 1990 International Conference on Parallel Processing, 1990
1988
Application of df/ihs to minimum total weighted flow time multiprocessor scheduling problems.
Syst. Comput. Jpn., 1988
Parallel Processing of Robot Dynamics Simulation Using Optimal Multiprocessor Scheduling Algorithms.
Syst. Comput. Jpn., 1988
1985
Parallel processing of robot-arm control computation on a multimicroprocessor system.
IEEE J. Robotics Autom., 1985
Syst. Comput. Jpn., 1985