Hironori Banba
According to our database1,
Hironori Banba
authored at least 5 papers
between 1992 and 2001.
Collaborative distances:
Collaborative distances:
Timeline
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
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1
2
1
1
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2001
IEEE J. Solid State Circuits, 2001
2000
Dynamically shift-switched dataline redundancy suitable for DRAM macro with wide data bus.
IEEE J. Solid State Circuits, 2000
1999
IEEE J. Solid State Circuits, 1999
1994
A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation.
IEEE J. Solid State Circuits, April, 1994
1992
A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure.
IEEE J. Solid State Circuits, November, 1992