Hiromitsu Kimura
According to our database1,
Hiromitsu Kimura
authored at least 20 papers
between 1999 and 2018.
Collaborative distances:
Collaborative distances:
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Bibliography
2018
IEICE Trans. Electron., 2018
2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
A 15-μA metabolic equivalents monitoring system using adaptive acceleration sampling and normally off computing.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
2015
IEEE Trans. Biomed. Circuits Syst., 2015
IEEE Trans. Biomed. Circuits Syst., 2015
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015
A low power 6T-4C non-volatile memory using charge sharing and non-precharge techniques.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
IEICE Trans. Inf. Syst., 2014
A 6.14µA normally-off ECG-SoC with noise tolerant heart rate extractor for wearable healthcare systems.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
A 2.4 pJ ferroelectric-based non-volatile flip-flop with 10-year data retention capability.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2013
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
A 14 µA ECG processor with robust heart rate monitor for a wearable healthcare system.
Proceedings of the ESSCIRC 2013, 2013
2007
Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2005
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005
2004
IEEE J. Solid State Circuits, 2004
Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 2004
2003
J. Multiple Valued Log. Soft Comput., 2003
2002
Multiple-Valued Logic-in-Memory VLSI Based on Ferroelectric Capacitor Storage and Charge Addition.
Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002
2000
DRAM-Cell-Based Multiple-Valued Logic-in-Memory VLSI with Charge Addition and Charge Storage.
Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000
1999
Multiple-Valued Content-Addressable Memory Using Metal-Ferroelectric-Semiconductor FETs.
Proceedings of the 29th IEEE International Symposium on Multiple-Valued Logic, 1999