Hiromi Hiraishi
According to our database1,
Hiromi Hiraishi
authored at least 15 papers
between 1981 and 2000.
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Bibliography
2000
Syst. Comput. Jpn., 2000
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000
1996
Proceedings of the 5th Asian Test Symposium (ATS '96), 1996
1995
Towards Verification of Bit-Slice Circuits-Time-Space Modal Model Checking Approach-.
IEICE Trans. Inf. Syst., 1995
Formal Methods Syst. Des., 1995
1994
Proceedings of the 15th IEEE Real-Time Systems Symposium (RTSS '94), 1994
1992
Theor. Comput. Sci., 1992
Proceedings of the Computer Aided Verification, Fourth International Workshop, 1992
1991
Vectorized Symbolic Model Checking of Computation Tree Logic for Sequential Machine Verification.
Proceedings of the Computer Aided Verification, 3rd International Workshop, 1991
Formal Verification of Speed-Dependent Asynchronous Cicuits Using Symbolic Model Checking of branching Time Regular Temporal Logic.
Proceedings of the Computer Aided Verification, 3rd International Workshop, 1991
1990
Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990
Branching Time Regular Temporal Logic for Model Checking with Linear Time Complexity.
Proceedings of the Computer Aided Verification, 2nd International Workshop, 1990
1988
Algebraic Specification of Parallel Systems Based on Binary Relations between Events.
Syst. Comput. Jpn., 1988
1981
IEEE Trans. Pattern Anal. Mach. Intell., 1981