Hiroki Yabe
According to our database1,
Hiroki Yabe
authored at least 5 papers
between 2012 and 2023.
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Bibliography
2023
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm<sup>2</sup> bit density with 3.2Gbps interface and 205MB/s program throughput.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2021
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs.
IEEE J. Solid State Circuits, 2021
2020
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2012
3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern.
IEICE Trans. Electron., 2012