Hiroaki Suzuki

According to our database, Hiroaki Suzuki authored at least 38 papers between 1995 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Patterning-Based Self-Assembly of Specific and Functional Structures.

Taichi Kokubu, Tatsuya Hikida, Hiroaki Suzuki

J. Robotics Mechatronics, October, 2023

Experimental and Numerical Investigation of Particle Capture for Agglutination-Based NP detection Using the Vibration-Induced Flow.

Kanji Kaneko, Mamiko Tsugane, Yosuke Hasegawa, Takeshi Hayakawa, Hiroaki Suzuki

Proceedings of the International Symposium on Micro-NanoMehatronics and Human Science, 2023

2022

Detection of nanoparticles in a minute sample using the vibration induced flow.

Kanji Kaneko, Mamiko Tsugane, Taku Sato, Takeshi Hayakawa, Yosuke Hasegawa, Hiroaki Suzuki

Proceedings of the 17th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2022

2021

A programming environment for multi-FPGA systems based on CyberWorkBench: an integrated design tool.

Hiroaki Suzuki, Wataru Takahashi, Kazutoshi Wakabayashi, Hideharu Amano

Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

2019

DESIGN AND EVALUATION OF MICROMIXIER WITH LOW DEAD VOLUME BASED ON VIBRATION-INDUCED FLOW.

Toshiyuki Matsui, Hiroaki Suzuki, Takeshi Hayakawa

Proceedings of the International Symposium on Micro-NanoMechatronics and Human Science, 2019

ShamFinder: An Automated Framework for Detecting IDN Homographs.

Hiroaki Suzuki, Daiki Chiba, Yoshiro Yoneya, Tatsuya Mori, Shigeki Goto

Proceedings of the Internet Measurement Conference, 2019

2018

Reagent Handling and Delivery System Using Cell-Sized Liposomes.

S. Katsuta, T. Okano, Hiroaki Suzuki

Proceedings of the 13th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2018

2017

The Complexity of Generalized Pipe Link Puzzles.

Akihiro Uejima, Hiroaki Suzuki, Atsuki Okada

J. Inf. Process., 2017

2016

Self-deformable micro/nanomotors with organic-inorganic hybrid structures.

Yoshitaka Yoshizumi, Masatoshi Yokokawa, Hiroaki Suzuki

Proceedings of the 11th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2016

Do Subliminal Hints Facilitate Sequential Planning When Solving a Spatial Insight Problem?

Hiromitsu Miyata, Hiroaki Suzuki

Proceedings of the 38th Annual Meeting of the Cognitive Science Society, 2016

2015

Fillmat is NP-Complete and ASP-Complete.

Akihiro Uejima, Hiroaki Suzuki

J. Inf. Process., 2015

2014

A Fully Static Topologically-Compressed 21-Transistor Flip-Flop With 75% Power Saving.

Natsumi Kawai, Shinichi Takayama, Junya Masumi, Naoto Kikuchi, Yasuo Itoh, Kyosuke Ogawa, Akimitsu Ugawa, Hiroaki Suzuki, Yasunori Tanaka

IEEE J. Solid State Circuits, 2014

Exploring the Unconscious Nature of Insight Using Continuous Flash Suppression and a Dual Task.

Hiroaki Suzuki, Haruaki Fukuda, Hiromitsu Miyata, Keishi Tsuchiya

Proceedings of the 36th Annual Meeting of the Cognitive Science Society, 2014

2013

Improving Academic Essays by Writing and Reading Peer Annotations on Source Documents.

Satoshi V. Suzuki, Hiroaki Suzuki

Proceedings of the 10th International Conference on Computer-Supported Collaborative Learning, 2013

2012

Prototype Implementation of a GPU-based Interactive Coupled Fluid-Structure Simulation.

Ryota Henmi, Yusuke Nishimura, Hiroaki Suzuki, Shinji Fukuma, Shin-ichiro Mori, Akinori Yamaguchi, Shinji Tomita

Proceedings of the 13th ACIS International Conference on Software Engineering, 2012

Automatic facilitation of social behavior by implicit inferring of social intention.

Haruaki Fukuda, Hiroaki Suzuki, Ayumi Yamada

Proceedings of the 34th Annual Meeting of the Cognitive Science Society, 2012

2011

Electrical detachment of cells for engineering capillary-like structures in a photocrosslinkable hydrogel.

Tatsuya Osaki, Takahiro Kakegawa, Hiroaki Suzuki, Junji Fukuda

Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

2010

Phase-adjustable error detection flip-flops with 2-stage hold-driven optimization, slack-based grouping scheme and slack distribution control for dynamic voltage scaling.

Masanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara

ACM Trans. Design Autom. Electr. Syst., 2010

2009

Basic examination concerning multiagent cooperation with entrainment.

Hirotoshi Asano, Hiroaki Suzuki, Masafumi Uchida, Hideto Ide

Artif. Life Robotics, 2009

Eliciting Emotional Thought During Critical Reading for Academic Writing.

Satoshi V. Suzuki, Aiko Shiraishi, Hiroaki Suzuki

Proceedings of the Artificial Intelligence in Education: Building Learning Systems that Care: From Knowledge Representation to Affective Modelling, 2009

2008

Post-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technology.

Hiroaki Suzuki, Masanori Kurimoto, Tadao Yamanaka, Hidehiro Takata, Hiroshi Makino, Hirofumi Shinohara

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

On-chip leakage monitor circuit to scan optimal reverse bias voltage for adaptive body-bias circuit under gate induced drain leakage effect.

Masako Fujii, Hiroaki Suzuki, Hiromi Notani, Hiroshi Makino, Hirofumi Shinohara

Proceedings of the ESSCIRC 2008, 2008

Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling.

Masanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara

Proceedings of the 45th Design Automation Conference, 2008

2007

Fast Tag Comparator Using Diode Partitioned Domino for 64-bit Microprocessors.

Hiroaki Suzuki, Chris H. Kim, Kaushik Roy

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Adaptive Supply Voltage for Low-Power Ripple-Carry and Carry-Select Adders.

Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy

IEICE Trans. Electron., 2007

2004

Comparing Software Rejuvenation Policies under Different Dependability Measures.

Tadashi Dohi, Hiroaki Suzuki, Kishor S. Trivedi

IEICE Trans. Inf. Syst., 2004

Low-power carry-select adder using adaptive supply voltage based on input vector patterns.

Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003

Low Power Adder with Adaptive Supply Voltage.

Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002

Cost-Effective Analysis of Software Systems with Periodic Rejuvenation.

Hiroaki Suzuki, Tadashi Dohi, Hiroyuki Okamura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2000

Novel VLIW code compaction method for a 3D geometry processor.

Hiroaki Suzuki, Hiroshi Making, Yoshio Matsuda

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1997

Authors Reply.

Hiroaki Suzuki, Hiroyuki Morinaka, Hiroshi Makino, Yasunobu Nakase, Koichiro Mashiko

IEEE J. Solid State Circuits, 1997

Comments on "Leading-zero anticipatory logic for high-speed floating point addition" [with reply].

Vojin G. Oklobdzija, Hiroaki Suzuki, Hiroyuki Morinaka, Hiroshi Makino, Yasunobu Nakase, Koichiro Mashiko, Tadashi Sumi

IEEE J. Solid State Circuits, 1997

A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme.

Hiroaki Suzuki, Hiroshi Makino, Koichiro Mashiko, Hisanori Hamano

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996

A 64-bit carry look ahead adder using pass transistor BiCMOS gates.

Kiniio Ueda, Hiroaki Suzuki, Kakutaro Suda, Hirofumi Shinohara, Koichiro Mashiko

IEEE J. Solid State Circuits, 1996

Leading-zero anticipatory logic for high-speed floating point addition.

Hiroaki Suzuki, Hiroyuki Morinaka, Hiroshi Makino, Yasunobu Nakase, Koichiro Mashiko, Tadashi Sumi

IEEE J. Solid State Circuits, 1996

A 286 MHz 64-b floating point multiplier with enhanced CG operation.

Hiroshi Makino, Hiroaki Suzuki, Hiroyuki Morinaka, Yasunobu Nakase, Koichiro Mashiko, Tadashi Sumi

IEEE J. Solid State Circuits, 1996

An 8.8-ns 54×54-bit multiplier with high speed redundant binary architecture.

Hiroshi Makino, Yasunobu Nakase, Hiroaki Suzuki, Hiroyuki Morinaka, Hirofumi Shinohara, Koichiro Mashiko

IEEE J. Solid State Circuits, 1996

1995

A BiCMOS wired-OR logic.

Yasunobu Nakase, Hiroaki Suzuki, Hiroshi Makino, Hirofumi Shinohara, Koichiro Mashiko

IEEE J. Solid State Circuits, June, 1995