Hiroaki Ohkubo
According to our database1,
Hiroaki Ohkubo
authored at least 3 papers
between 1997 and 2003.
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Bibliography
2003
IEEE J. Solid State Circuits, 2003
2000
A 250-Mb/s/pin, 1-Gb double-data-rate SDRAM with a bidirectional delay and an interbank shared redundancy scheme.
IEEE J. Solid State Circuits, 2000
1997
A 500-MHz 4-Mb CMOS pipeline-burst cache SRAM with point-to-point noise reduction coding I/O.
IEEE J. Solid State Circuits, 1997