Hiroaki Nambu
According to our database1,
Hiroaki Nambu
authored at least 6 papers
between 1994 and 2000.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2000
Synonym hit RAM - a 500-MHz CMOS SRAM macro with 576-bit parallel comparison and parity check functions.
IEEE J. Solid State Circuits, 2000
Power reduction techniques for a 1-Mb ECL-CMOS SRAM with an access time of 550 ps and an operating frequency of 900 MHz.
IEEE J. Solid State Circuits, 2000
1998
1996
A soft-error-immune 0.9-ns 1.15-Mb ECL-CMOS SRAM with 30-ps 120 k logic gates and on-chip test circuitry.
IEEE J. Solid State Circuits, 1996
1994
IEEE J. Solid State Circuits, November, 1994