Hirenkumar Paneliya

According to our database, Hirenkumar Paneliya authored at least 6 papers between 2018 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A Flexible Multichannel EEG Artifact Identification Processor using Depthwise-Separable Convolutional Neural Networks.

Mohit Khatwani, Hasib-Al Rashid, Hirenkumar Paneliya, Mark Horton, Nicholas R. Waytowich, W. David Hairston, Tinoosh Mohsenin

ACM J. Emerg. Technol. Comput. Syst., 2021

2020

CSCMAC - Cyclic Sparsely Connected Neural Network Manycore Accelerator.

Hirenkumar Paneliya, Morteza Hosseini, Avesta Sasan, Houman Homayoun, Tinoosh Mohsenin

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

A Low-Power LSTM Processor for Multi-Channel Brain EEG Artifact Detection.

Hasib-Al Rashid, Nitheesh Kumar Manjunath, Hirenkumar Paneliya, Morteza Hosseini, W. David Hairston, Tinoosh Mohsenin

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2019

Minimizing Classification Energy of Binarized Neural Network Inference for Wearable Devices.

Morteza Hosseini, Hirenkumar Paneliya, Utteja Kallakuri, Mohit Khatwani, Tinoosh Mohsenin

Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

On the Complexity Reduction of Dense Layers from O(N2) to O(NlogN) with Cyclic Sparsely Connected Layers.

Morteza Hosseini, Mark Horton, Hiren Paneliya, Uttej Kallakuri, Houman Homayoun, Tinoosh Mohsenin

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Energy Efficient Convolutional Neural Networks for EEG Artifact Detection.

Mohit Khatwani, Morteza Hosseini, Hirenkumar Paneliya, Tinoosh Mohsenin, W. David Hairston, Nicholas R. Waytowich

Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018