Hieu Van Tran

According to our database, Hieu Van Tran authored at least 2 papers between 2005 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

Split-Gate Floating Poly SuperFlash^® Memory Technology, Design, and Reliability.

Nhan Do, Hieu Van Tran, Alex Kotov, Vipin Tiwari

Proceedings of the Embedded Flash Memory for Embedded Systems: Technology, 2018

2005

A precision high voltage wave-shaper for multi-Gbit source side injection MLC NOR flash memory.

Hieu Van Tran, William John Saiki, Jack Edward Frayer, Thuan Vu, Anh Ly, Sang Thanh Nguyen, Hung Quoc Nguyen, Douglas James Lee, Michael Stephen Briner

Proceedings of the 31st European Solid-State Circuits Conference, 2005