Hideyuki Sugiyama

According to our database, Hideyuki Sugiyama authored at least 4 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Microscopic Modeling of MgO Barrier Degradation Due to Interface Oxygen Frenkel Defects in Scaled MTJ Toward High-Density STT-MRAM.

Rina Takashima, Takeo Koike, Shogo Itai, Hideyuki Sugiyama, Young Min Lee, Masaru Toko, Soichiro Ono, Daisuke Watanabe, Soichi Oikawa, Katsuhiko Koi, Hiroyuki Kanaya, Masahiko Nakayama, Kohji Nakamura

Proceedings of the IEEE International Reliability Physics Symposium, 2024

2018

High-Speed Voltage Control Spintronics Memory (VoCSM) Having Broad Design Windows.

Naoharu Shimomura, Hiroaki Yoda, Tomoaki Inokuchi, Katsuhiko Koi, Hideyuki Sugiyama, Yushi Kato, Yuichi Ohsawa, Altansargai Buyandalai, Satoshi Shirotori, Soichi Oikawa, Mariko Shimizu, Mizue Ishikawa, Tiwari Ajay, Atsushi Kurobe

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2017

High-speed voltage-control spintronics memory focused on reduction in write current.

Hideyuki Sugiyama, Hiroaki Yoda, Katsuhiko Koi, Soichi Oikawa, Buyandalai Altansargai, Tomoaki Inokuchi, Satoshi Shirotori, Mariko Shimizu, Yuichi Kato, Yuichi Ohsawa, Mizue Ishikawa, Ajay Tiwari, Naoharu Shimomura, Yoshiaki Saito, Atsushi Kurobe

Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017

2011

Scalability of spin FPGA: A Reconfigurable Architecture based on spin MOSFET

Tetsufumi Tanamoto, Hideyuki Sugiyama, Tomoaki Inokuchi, Takao Marukame, Mizue Ishikawa, Kazutaka Ikegami, Yoshiaki Saito

CoRR, 2011