Hidetaka Aoki

According to our database, Hidetaka Aoki authored at least 6 papers between 2013 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

An empirical study on performance optimization at district cooling plant of Universiti Teknologi PETRONAS.

Xiaoming Zhang, Hidetaka Aoki, Akiko Sato, Mohd Amin Abd Majid

Proceedings of the 2017 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2017

2016

A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing.

Masanao Yamaoka, Chihiro Yoshimura, Masato Hayashi, Takuya Okuyama, Hidetaka Aoki, Hiroyuki Mizuno

IEEE J. Solid State Circuits, 2016

Accelerator Chip for Ground-state Searches of Ising Model with Asynchronous Random Pulse Distribution.

Masato Hayashi, Masanao Yamaoka, Chihiro Yoshimura, Takuya Okuyama, Hidetaka Aoki, Hiroyuki Mizuno

Int. J. Netw. Comput., 2016

2015

24.3 20k-spin Ising chip for combinational optimization problem with CMOS annealing.

Masanao Yamaoka, Chihiro Yoshimura, Masato Hayashi, Takuya Okuyama, Hidetaka Aoki, Hiroyuki Mizuno

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

An Accelerator Chip for Ground-State Searches of the Ising Model with Asynchronous Random Pulse Distribution.

Masato Hayashi, Masanao Yamaoka, Chihiro Yoshimura, Takuya Okuyama, Hidetaka Aoki, Hiroyuki Mizuno

Proceedings of the Third International Symposium on Computing and Networking, 2015

2013

Spatial computing architecture using randomness of memory cell stability under voltage control.

Chihiro Yoshimura, Masanao Yamaoka, Hidetaka Aoki, Hiroyuki Mizuno

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013