Hideo Wada
According to our database1,
Hideo Wada
authored at least 8 papers
between 1988 and 2009.
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Bibliography
2009
1997
Deadlock-Free Fault-tolerant Routing in the Multi-dimensional Crossbar Network and Its Implementation for the Hitachi SR2201.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997
Architecture and Performance of the Hitachi SR2201 Massively Parallel Processor System.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997
1993
A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers.
Proceedings of the 7th international conference on Supercomputing, 1993
1989
Proceedings of the Supercomputer'89: Anwendungen, Architekturen, Trends, 1989
Proceedings of the 3rd international conference on Supercomputing, 1989
1988
High-speed processing schemes for summation type and iteration type vector instructions on Hitachi supercomputer S-820 system.
Proceedings of the 2nd international conference on Supercomputing, 1988
High-Speed Vector Instruction Execution Schemes of HITACHI Supercomputer S-820 System.
Proceedings of the International Conference on Parallel Processing, 1988