Hideo Aiso
According to our database1,
Hideo Aiso
authored at least 38 papers
between 1974 and 1992.
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Bibliography
1992
An artificial maximum neural network: a winner-take-all neuron model forcing the state of the system in a solution domain.
Biol. Cybern., 1992
1991
25 Years of MITI and Its Influence on Computing Research in Japan.
Computer, 1991
1989
Proceedings of the Database Machines, Sixth International Workshop, 1989
1988
Fault-Tolerant Scheme on Partial Differential Equations with Nearest-Neighbor Mesh-Connected Machines.
Syst. Comput. Jpn., 1988
3-D VLSI technology in Japan and an example: a syndrome decoder for double error correction.
Future Gener. Comput. Syst., 1988
Logic Programming Debugger Using Control Flow Specification.
Proceedings of the Logic Programming '88, 1988
1987
New Gener. Comput., 1987
Proceedings of the Database Machines and Knowledge Base Machines, 1987
Proceedings of the Database Machines and Knowledge Base Machines, 1987
1986
Syst. Comput. Jpn., 1986
Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986
Fault Tolerant Scheme on Partial Differential Equations.
Proceedings of the International Conference on Parallel Processing, 1986
Proceedings of the CONPAR 86: Conference on Algorithms and Hardware for Parallel Processing, 1986
Proceedings of the 11th International Conference on Computational Linguistics, 1986
1985
Syst. Comput. Jpn., 1985
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985
Proceedings of the 7th IEEE Symposium on Computer Arithmetic, 1985
1984
MILK: Multi Level Interactive Logic Simulator at Keio University: Experience in Using the Contraints Language.
Proceedings of the Expert Database Systems, 1984
1983
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983
New Matrix Equation Solvers in GF(2) Employing Cramer with Chio Method.
Proceedings of the International Conference on Parallel Processing, 1983
Proceedings of the 6th IEEE Symposium on Computer Arithmetic, 1983
1982
A novel approach to parallel processing cryptosystem.
Proceedings of the International Conference on Parallel Processing, 1982
Performance Analysis for Parallel Processing Schemes of Relational Operations and a Relational Database Machine Architecture with Optimal Scheme Selection Mechanism.
Proceedings of the Proceedings of the 3rd International Conference on Distributed Computing Systems, 1982
Proceedings of the Symposium on Architectural Support for Programming Languages and Operating Systems, 1982
1981
Proceedings of the 8th Annual Symposium on Computer Architecture, 1981
Design and Evaluation of a Relational Data Base Machine Employing Advanced Data Structures and Algorithms.
Proceedings of the 8th Annual Symposium on Computer Architecture, 1981
1979
Proceedings of the 1979 International Workshop on Managing Requirements Knowledge, 1979
A New Approach to an Adaptive Computer - An Automatic Recovery Mechanism to Prevent the Occurance of Subtract Errors.
Proceedings of the 6th Annual Symposium on Computer Architecture, 1979
Proceedings of the 4th International Conference on Software Engineering, 1979
1978
A multi-processor ARES with associative processing capability on semantic data bases.
Proceedings of the American Federation of Information Processing Societies: 1978 National Computer Conference, 1978
Recent progress in japan overview.
Proceedings of the American Federation of Information Processing Societies: 1978 National Computer Conference, 1978
1977
A Debugging Machine - An Approach to an Adaptive Computer.
Proceedings of the Information Processing, 1977
A multi-microprocessor approach to a high-speed and low-cost continuous-system simulation.
Proceedings of the American Federation of Information Processing Societies: 1977 National Computer Conference, 1977
ARES: a memory, capable of associating stored information through relevancy estimation.
Proceedings of the American Federation of Information Processing Societies: 1977 National Computer Conference, 1977
1974
A Very High-Speed Microprogrammable Pipeline Signal Processor.
Proceedings of the Information Processing, 1974