Hideaki Arima

According to our database, Hideaki Arima authored at least 3 papers between 1988 and 1989.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of four.

1989

120-ns 128 K*8-bit/64 K*16-bit CMOS EEPROMs.

Yasushi Terada, Kazuo Kobayashi, Takeshi Nakayama, Masanori Hayashikoshi, Yoshikazu Miyawaki, Natsuo Ajika, Hideaki Arima, Takayuki Matsukawa, Tsutomu Yoshihara

IEEE J. Solid State Circuits, October, 1989

A 5 V only one-transistor 256 K EEPROM with page-mode erase.

Takeshi Nakayama, Yoshikazu Miyawaki, Kazuo Kobayashi, Yasushi Terada, Hideaki Arima, Takayuki Matsukawa, Tsutomu Yoshihara

IEEE J. Solid State Circuits, August, 1989

1988

A new architecture for the NVRAM-an EEPROM backed-up dynamic RAM.

Yasushi Terada, Kazuo Kobayashi, Takeshi Nakayama, Hideaki Arima, Tsutomu Yoshihara

IEEE J. Solid State Circuits, February, 1988