Hervé Tatenguem

According to our database, Hervé Tatenguem authored at least 10 papers between 2011 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Cross-layer design, optimization and prototyping of nocs for the next generation of homogeneous many-core systems.

Hervé Tatenguem

PhD thesis, 2014

Towards compelling cases for the viability of silicon-nanophotonic technology in future manycore systems.

Luca Ramini, Hervé Tatenguem Fankem, Alberto Ghiribaldi, Paolo Grani, Marta Ortín-Obón, Anja Boos, Sandro Bartolini

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

Augmenting manycore programmable accelerators with photonic interconnect technology for the high-end embedded computing domain.

Marco Balboni, Marta Ortín-Obón, Alessandro Capotondi, Hervé Tatenguem Fankem, Alberto Ghiribaldi, Luca Ramini, Víctor Viñals, Andrea Marongiu, Davide Bertozzi

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

A feature-rich NoC switch with cross-feature optimizations for the next generation of reliable and reconfigurable embedded systems.

Alessandro Strano, Alberto Ghiribaldi, Hervé Tatenguem Fankem, Davide Bertozzi

Proceedings of the 8th International Workshop on Interconnection Network Architecture, 2014

A complete electronic network interface architecture for global contention-free communication over emerging optical networks-on-chip.

Marta Ortín-Obón, Luca Ramini, Hervé Tatenguem Fankem, Víctor Viñals, Davide Bertozzi

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

Assessing the energy break-even point between an optical NoC architecture and an aggressive electronic baseline.

Luca Ramini, Alberto Ghiribaldi, Paolo Grani, Sandro Bartolini, Hervé Tatenguem Fankem, Davide Bertozzi

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies.

Alberto Ghiribaldi, Hervé Tatenguem Fankem, Federico Angiolini, Mikkel Bystrup Stensgaard, Tobias Bjerregaard, Davide Bertozzi

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2012

Ultra-low latency NoC testing via pseudo-random test pattern compaction.

Hervé Tatenguem, Alessandro Strano, Vineeth Govind, Jaan Raik, Davide Bertozzi

Proceedings of the 2012 International Symposium on System on Chip, 2012

Cost-Effective Contention Avoidance in a CMP with Shared Memory Controllers.

Samuel Rodrigo, Frank Olaf Sem-Jacobsen, Hervé Tatenguem, Tor Skeie, Davide Bertozzi

Proceedings of the Euro-Par 2012 Parallel Processing - 18th International Conference, 2012

2011

Contrasting multi-synchronous MPSoC design styles for fine-grained clock domain partitioning: the full-HD video playback case study.

Hervé Tatenguem, Daniele Ludovici, Alessandro Strano, Davide Bertozzi, Helmut Reinig

Proceedings of the 4th International Workshop on Network on Chip Architectures, 2011