Hervé Lapuyade

According to our database1, Hervé Lapuyade authored at least 35 papers between 2000 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Transceiver for Ultrasonic Intra-Body Area Networks With Non-Coherent BPSK Detection.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2024

2023
A Proof-of-Concept of a Multiple-Cell Upsets Detection Method for SRAMs in Space Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

A Block-Based LMS Using the Walsh Transform for Digital Predistortion of Power Amplifiers.
IEEE Trans. Commun., October, 2023

A (0.75-1.13) mW and (2.4-5.2) ps RMS Jitter Integer-N-Based Dual-Loop PLL for Indoor and Outdoor Positioning in 28-nm FD-SOI CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

A Walsh-Based Arbitrary Waveform Generator for 5G Applications in 28nm FD-SOI CMOS Technology.
IEEE Access, 2023

A Wide-Band High-Speed Sample and Hold in 0.35µm CMOS Technology.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

A MCU-robust Interleaved Data/Detection SRAM for Space Environments.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

A Tool for Automatic Radiation-Hardened SRAM Layout Generation.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Low Power Frequency Dividers using TSPC logic in 28nm FDSOI Technology.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

A 40 GHz Varactor-less Class-C VCO with 17.1% Tuning Range and Long-Term Reliability in 28nm FD-SOI for Satellite Communications.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
28nm FDSOI Ultra Low Power 1.5-2.0 GHz Factorial-DLL Frequency Synthesizer.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Design methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020
Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22 nm FDSOI.
Proceedings of the VLSI-SoC: Design Trends, 2020

A 0.8V 875 MS/s 7b low-power SAR ADC for ADC-Based Wireline Receivers in 22nm FDSOI.
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

2019
A Hierarchical Track and Hold Circuit for High Speed ADC-Based Receivers in 22nm FDSOI.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Design of CMOS integrated circuits for radiation hardening and its application to space electronics.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2013
Design of a TID-tolerant low-level offset operational amplifier.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

2010
Fault Coverage on RF VCOs and BIST for Wafer Sort Using Peak-to-Peak Voltage Detectors.
J. Electron. Test., 2010

2009
Voltage controlled delay line with phase quadrature outputs for [0.9-4] GHz F-DLL dedicated to zero-IF multi-standard LO.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

BIST scheme for RF VCOs allowing the self-correction of the cut.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
Design of a 0.9 V 2.45 GHz Self-Testable and Reliability-Enhanced CMOS LNA.
IEEE J. Solid State Circuits, 2008

2007
A Robust 130 nm-CMOS Built-In Current Sensor Dedicated to RF Applications.
J. Electron. Test., 2007

Analog Design Considerations For Independently Driven Double Gate MOSfets And Their Application in a Low-Voltage OTA.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
RF CMOS body-effect circuits.
Microelectron. J., 2006

A 4mA, 0.25 SiGe, 23GHz BiFET Low Noise Amplifier.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

A Low-Power and Low Silicon Area Testable CMOS LNA Dedicated to 802.15.4 Sensor Network Applications.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

A Robust 130nm-CMOS Built-In Current Sensor Dedicated to RF Applications.
Proceedings of the 11th European Test Symposium, 2006

2005
A 1 V 270 My-W 2 GHz CMOS Synchronized Ring Oscillator Based Prescaler.
J. Low Power Electron., 2005

2003
Low-cost backside laser test method to pre-characterize the COTS IC's sensitivity to Single Event Effects.
Microelectron. Reliab., 2003

A 0.9V body effect feedback 2 GHz low noise amplifier.
Proceedings of the ESSCIRC 2003, 2003

2001
Theoretical Investigation of an Equivalent Laser LET.
Microelectron. Reliab., 2001

Front Side and Backside OBIT Mappings applied to Single Event Transient Testing.
Microelectron. Reliab., 2001

A New Laser System for X-Rays Flashes Sensitivity Evaluation.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

2000
An Overview of the Applications of a Pulsed Laser System for SEU Testing.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000


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