A Model and Methodology for Hardware-Software Codesign. - Donald E. Thomas; Jay K. Adams; Herman Schmit (IEEE Des. Test Comput., 1993)

Hidden Markov modeling and fuzzy controllers in FPGAs. - Herman Schmit; Donald E. Thomas (FCCM, 1995)

Array mapping in behavioral synthesis. - Herman Schmit; Donald E. Thomas (ISSS, 1995)

Incremental reconfiguration for pipelined applications. - Herman Schmit (FCCM, 1997)

Is Reconfigurable Computing Commercially Viable (panel)? - Herman Schmit (FPGA, 1997)

Synthesis of application-specific memory designs. - Herman Schmit; Donald E. Thomas (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A low-power 16-bit multiplier-accumulator using series-regulated mixed swing techniques. - Ram Krishnamurthy 001; Herman Schmit; L. Richard Carley (CICC, 1998)

Characterization and Parameterization of a Pipeline Reconfigurable FPGA. - Matthew Moe; Herman Schmit; Seth Copen Goldstein (FCCM, 1998)

Managing Pipeline-Reconfigurable FPGAs. - Srihari Cadambi; Jeffrey Weener; Seth Copen Goldstein; Herman Schmit; Donald E. Thomas (FPGA, 1998)

Address generation for memories containing multiple arrays. - Herman Schmit; Donald E. Thomas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Vertical Benchmarks for CAD. - Christopher Inacio; Herman Schmit; David Nagle; Andrew Ryan; Donald E. Thomas; Yingfai Tong; Ben Klass (DAC, 1999)

PCI-PipeRench and the SWORDAPI: A System for Stream-Based Reconfigurable Computing. - Ronald Laufer; R. Reed Taylor; Herman Schmit (FCCM, 1999)

Extra-Dimensional Island-Style FPGAs. - Herman Schmit (FPGA, 1999)

PipeRench: A Coprocessor for Streaming multimedia Acceleration. - Seth Copen Goldstein; Herman Schmit; Matthew Moe; Mihai Budiu; Srihari Cadambi; R. Reed Taylor; Ronald Laufer (ISCA, 1999)

Mixed-swing quadrail for low power dual-rail domino logic. - Bharath Ramasubramanian; Herman Schmit; L. Richard Carley (ISLPED, 1999)

Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware. - Benjamin A. Levine; R. Reed Taylor; Herman Schmit (FCCM, 2000)

The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designers. - Herman Schmit; Ray Andraka; Philip Friedin; Satnam Singh; Tim Southgate (FPGA, 2000)

Scalable interconnect and power distribution for island-style FPGAs (poster abstract). - Herman Schmit; David Whelihan; Peter Kamarchik; Frank Gennari (FPGA, 2000)

PipeRench implementation of the instruction path coprocessor. - Yuan C. Chou; Pazhani Pillai; Herman Schmit; John Paul Shen (MICRO, 2000)

PipeRench: A Reconfigurable Architecture and Compiler. - Seth Copen Goldstein; Herman Schmit; Mihai Budiu; Srihari Cadambi; Matthew Moe; R. Reed Taylor (Computer, 2000)

Pipeline Reconfigurable FPGAs. - Herman Schmit; Srihari Cadambi; Matthew Moe; Seth Copen Goldstein (J. VLSI Signal Process., 2000)

SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. - Pradeep K. Khosla; Herman Schmit; Mary Jane Irwin; Narayanan Vijaykrishnan; Tom Cain; Steven P. Levitan; Dave Landis (MSE, 2001)

PipeRench: A virtualized programmable datapath in 0.18 micron technology. - Herman Schmit; David Whelihan; Andrew Tsai; Matthew Moe; Benjamin A. Levine; R. Reed Taylor (CICC, 2002)

Memory optimization in single chip network switch fabrics. - David Whelihan; Herman Schmit (DAC, 2002)

Queue Machines: Hardware Compilation in Hardware. - Herman Schmit; Benjamin A. Levine; Benjamin Ylvisaker (FCCM, 2002)

FPGA switch block layout and evaluation. - Herman Schmit; Vikas Chandra (FPGA, 2002)

Morphable Multipliers. - Silviu M. S. A. Chiricescu; Michael A. Schuette; Robin Glinton; Herman Schmit (FPL, 2002)

Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area Approach. - Vikas Chandra; Herman Schmit (ISVLSI, 2002)

Synthesis of Morphable Multipliers. - Silviu M. S. A. Chiricescu; Michael A. Schuette; Herman Schmit; Robin Glinton (IWLS, 2002)

Regular logic fabrics for a via patterned gate array (VPGA). - Kim Yaw Tong; V. Kheterpal; Vyacheslav Rovner; Lawrence T. Pileggi; Herman Schmit (CICC, 2003)

Exploring regular fabrics to optimize the performance-cost trade-off. - Lawrence T. Pileggi; Herman Schmit; Andrzej J. Strojwas; Padmini Gopalakrishnan; V. Kheterpal; Aneesh Koorapaty; Chetan Patel; Vyacheslav Rovner; Kim Yaw Tong (DAC, 2003)

Heterogeneous Programmable Logic Block Architectures. - Aneesh Koorapaty; Vikas Chandra; Kim Yaw Tong; Chetan Patel; Lawrence T. Pileggi; Herman Schmit (DATE, 2003)

Asynchronous PipeRench: Architecture and Performance Estimations. - Hiroto Kagotani; Herman Schmit (FCCM, 2003)

Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable. - Benjamin A. Levine; Herman Schmit (FCCM, 2003)

Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics. - Aneesh Koorapaty; Lawrence T. Pileggi; Herman Schmit (FPL, 2003)

Floorplanning of pipelined array modules using sequence pairs. - Matthew Moe; Herman Schmit (ISPD, 2003)

An architectural exploration of via patterned gate arrays. - Chetan Patel; Anthony Cozzie; Herman Schmit; Lawrence T. Pileggi (ISPD, 2003)

CAD Tool Support For A Multi-University Soc Certificate Program: The Digital Sandbox. - Thomas Kroll; Herman Schmit; Dave Landis (MSE, 2003)

The Sandbox Design Experience Course. - Herman Schmit; Thomas Kroll; Max Khusid; Ivan S. Kourtev; Narayanan Vijaykrishnan; David L. Landis (MSE, 2003)

Enabling energy efficiency in via-patterned gate array devices. - R. Reed Taylor; Herman Schmit (DAC, 2004)

An Interconnect Channel Design Methodology for High Performance Integrated Circuits. - Vikas Chandra; Anthony Xu; Herman Schmit; Lawrence T. Pileggi (DATE, 2004)

A power aware system level interconnect design methodology for latency-insensitive systems. - Vikas Chandra; Herman Schmit; Anthony Xu; Lawrence T. Pileggi (ICCAD, 2004)

Creating a power-aware structured ASIC. - R. Reed Taylor; Herman Schmit (ISLPED, 2004)

Evaluating Alternative Implementations for LDPC Decoder Check Node Function. - Theo Theocharides; Greg M. Link; Eric J. Swankoski; Narayanan Vijaykrishnan; Mary Jane Irwin; Herman Schmit (ISVLSI, 2004)

A low power approach to system level pipelined interconnect design. - Vikas Chandra; Anthony Xu; Herman Schmit (SLIP, 2004)

Layout techniques for FPGA switch blocks. - Herman Schmit; Vikas Chandra (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Placement challenges for structured ASICs. - Herman Schmit; Amit Gupta; Radu Ciobanu (ISPD, 2008)

Stratix™ 10 High Performance Routable Clock Networks. - Carl Ebeling; Dana How; David M. Lewis; Herman Schmit (FPGA, 2016)

Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter: Invited Paper. - Herman Schmit; Randy Huang (ISLPED, 2016)

3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration. - David Greenhill; Ron Ho; David M. Lewis; Herman Schmit; Kok Hong Chan; Andy Tong; Sean Atsatt; Dana How; Peter McElheny; Keith Duwel; Jeffrey Schulz; Darren Faulkner; et al. (ISSCC, 2017)

Spatial Timing Analysis With Exact Propagation of Delay and Application to FPGA Performance. - David M. Lewis; Herman Schmit (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Multi-input Serial Adders for FPGA-like Computational Fabric. - Herman Schmit; Matthew Denton (FPGA, 2022)

Direct Spatial Implementation of Sparse Matrix Multipliers for Reservoir Computing. - Matthew Denton; Herman Schmit (HPCA, 2022)

Improving Standard-Cell Design Flow using Factored Form Optimization. - Alessandro Tempia Calvino; Alan Mishchenko; Herman Schmit; Ethan Mahintorabi; Giovanni De Micheli; Xiaoqing Xu (DAC, 2023)