Herbert H. J. Hum

According to our database1, Herbert H. J. Hum authored at least 22 papers between 1988 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2005
Enhanced code density of embedded CISC processors with echo technology.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

2003
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU.
Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September, 2003

1996
A Study of the EARTH-MANNA Multithreaded System.
Int. J. Parallel Program., 1996

Polling Watchdog: Combining Polling and Interrupts for Efficient Message Handling.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

Quantitive studies of data-locality sensitivity on the EARTH multithreaded architecture: preliminary results.
Proceedings of the 3rd International Conference on High Performance Computing, 1996

Data locality sensitivity of multithreaded computations on a distributed-memory multiprocessor.
Proceedings of the 1996 conference of the Centre for Advanced Studies on Collaborative Research, 1996

1995
The Threaded Communication Library: Preliminary Experiences on a Multiprocessor with Dual-Processor Nodes.
Proceedings of the 9th international conference on Supercomputing, 1995

A Design Frame for Hybrid Access Caches.
Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture (HPCA 1995), 1995

Costs and Benefits of Multithreading with Off-the-Shelf RISC Processors.
Proceedings of the Euro-Par '95 Parallel Processing, 1995

A design study of the EARTH multiprocessor.
Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques, 1995

1994
Building Multithreaded Architectures with Off-the-Shelf Microprocessors.
Proceedings of the 8th International Symposium on Parallel Processing, 1994

A Performance Debugger for a Language Supporting Data Distribution Primitives.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

Simulating networks of superscalar processors.
Proceedings of the Proceedings 27th Annual Simulation Symposium, 1994

Concurrent Execution of Heterogeneous Threads in the Super-Actor Machine.
Proceedings of the Multithreaded Computer Architecture, 1994

1992
A high-speed memory organization for hybrid dataflow / von Neumann computing.
Future Gener. Comput. Syst., 1992

1991
Efficient support of concurrent threads in a hybrid dataflow/von Neumann architecture.
Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing, 1991

A Novel High-Speed Memory Organization for Fine-Grain Multi-Thread Computing.
Proceedings of the PARLE '91: Parallel Architectures and Languages Europe, 1991

Towards an Efficient Hybrid Dataflow Architecture Model.
Proceedings of the PARLE '91: Parallel Architectures and Languages Europe, 1991

1990
Towards efficient fine-grain software pipelining.
Proceedings of the 4th international conference on Supercomputing, 1990

An Efficient Scheme for Fine-Grain Software Pipelining.
Proceedings of the CONPAR 90, 1990

1988
Summary of the workshop on frontiers in functional programming and dataflow architecture.
SIGARCH Comput. Archit. News, 1988

Design of an Efficient Dataflow Architecture without Data Flow.
Proceedings of the International Conference on Fifth Generation Computer Systems, 1988


  Loading...