Herbert Grünbacher

According to our database, Herbert Grünbacher authored at least 13 papers between 1988 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2004

A scalable instruction buffer and align unit for xDSPcore.

Christian Panis, Herbert Grünbacher, Jari Nurmi

IEEE J. Solid State Circuits, 2004

2003

A Branch File for a Configurable DSP Core.

Christian Panis, Gunther Laure, Wolfgang Lazian, Herbert Grünbacher, Jari Nurmi

Proceedings of the International Conference on VLSI, 2003

xICU - in interrupt control unit for a configurable DSP core.

Christian Panis, J. Hohl, Herbert Grünbacher, Jari Nurmi

Proceedings of the 2003 International Symposium on System-on-Chip, 2003

xLIW - a scaleable long instruction word.

Christian Panis, Raimund Leitner, Herbert Grünbacher, Jari Nurmi

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A scaleable instruction buffer for a configurable DSP core.

Christian Panis, Michael Bramberger, Herbert Grünbacher, Jari Nurmi

Proceedings of the ESSCIRC 2003, 2003

2002

TTA-C2, A Single Chip Communication Controller for the Time-Triggered-Protocol.

Manfred Ley, Herbert Grünbacher

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

2000

On re-configurable methods and gate array based solutions of fast forward error correction systems for software radio and set-top-box applications.

Alfred Blaickner, Herbert Grünbacher

IEEE Trans. Consumer Electron., 2000

Fast Carrier and Phase Synchronization Units for Digital Receivers Based on Re-configurable Logic.

Alfred Blaickner, O. Nagy, Herbert Grünbacher

Proceedings of the Field-Programmable Logic and Applications, 2000

1996

WinDLX and MIPSim Pipeline Simulators for Teaching Computer Architecture.

Herbert Grünbacher, Maziar Khosravipour

Proceedings of the IEEE Symposium and Workshop on Engineering of Computer Based Systems (ECBS'96), 1996

1995

VHDL-Based Rapid Hardware Prototyping Using FPGA Technology.

Maziar Khosravipour, Herbert Grünbacher

Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

1993

Petri Nets Modeling in Pipelined Microprocessor Design.

Qian Zhang, Herbert Grünbacher

Proceedings of the Application and Theory of Petri Nets 1993, 1993

1992

JAPROC - An 8 bit Micro Controller Design and Its Test Environment.

Herbert Grünbacher, Alexander Jaud

Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992

1988

Methoden der VLSI-Implementierungen für Graphikanwendungen.

Herbert Grünbacher

Proceedings of the Austrographics '88, 1988