Henry Selvaraj
According to our database1,
Henry Selvaraj
authored at least 66 papers
between 1995 and 2022.
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Bibliography
2022
Proceedings of the Neural Information Processing - 29th International Conference, 2022
2017
FPGA Implementation for Epileptic Seizure Detection Using Amplitude and Frequency Analysis of EEG Signals.
Proceedings of the 25th International Conference on Systems Engineering, 2017
Analog and Mixed-Signal Verification Using Satisfiability Solver on Discretized Models.
Proceedings of the 25th International Conference on Systems Engineering, 2017
Proceedings of the 25th International Conference on Systems Engineering, 2017
Interconnection Networks Efficiency in System-on-Chip Distributed Computing System: Concentrated Mesh and Fat Tree.
Proceedings of the 25th International Conference on Systems Engineering, 2017
2016
Energy-Efficient Computing Solutions for Internet of Things with ZigBee Reconfigurable Devices.
Int. J. Softw. Innov., 2016
2015
Int. J. Comput. Intell. Appl., 2015
Concentrated mesh and fat tree usage efficiency in System-on-Chip based multiprocessor distributed processing architectures.
Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015
Energy-efficient distributed computing solutions for Internet of Things with ZigBee devices.
Proceedings of the 14th IEEE/ACIS International Conference on Computer and Information Science, 2015
2014
Proceedings of the Progress in Systems Engineering, 2014
Proceedings of the Progress in Systems Engineering, 2014
Proceedings of the Progress in Systems Engineering, 2014
2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the Advances in Systems Science, 2013
A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing.
Proceedings of the Advances in Systems Science, 2013
Proceedings of the Advances in Systems Science, 2013
2012
Accelerating High Performance Computing Applications: Using CPUs, GPUs, Hybrid CPU/GPU, and FPGAs.
Proceedings of the 13th International Conference on Parallel and Distributed Computing, 2012
Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012
2011
Supervised Classification of White Blood Cells by Fusion of Color Texture Features and Neural Network.
Int. J. Comput. Intell. Appl., 2011
Fast and efficient processor allocation algorithm for torus-based chip multiprocessors.
Comput. Electr. Eng., 2011
Int. J. Appl. Math. Comput. Sci., 2011
Proceedings of the 21st International Conference on Systems Engineering (ICSEng 2011), 2011
Proceedings of the 21st International Conference on Systems Engineering (ICSEng 2011), 2011
2010
Hardware implementation of processor allocation schemes for mesh-based chip multiprocessors.
Microprocess. Microsystems, 2010
Hybrid Approach for Brain Tumor Segmentation in Magnetic Resonance Images Using Cellular Neural Networks and Optimization Techniques.
Int. J. Comput. Intell. Appl., 2010
Proceedings of the Seventh International Conference on Information Technology: New Generations, 2010
2009
Int. J. Comput. Intell. Appl., 2009
Int. J. Comput. Intell. Appl., 2009
Proceedings of the Sixth International Conference on Information Technology: New Generations, 2009
2008
Int. J. Comput. Intell. Appl., 2008
2007
An efficient variable partitioning approach for functional decomposition of circuits.
J. Syst. Archit., 2007
Placement-Directed Behavioral Synthesis Scheme for Simultaneous Scheduling Binding and Partitioning with Resources Operating at Multiple Voltages.
Int. J. Comput. Their Appl., 2007
Scheduling and optimal voltage selection with multiple supply voltages under resource constraints.
Integr., 2007
Proceedings of the Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2007
2006
Scheduling and Partitioning Schemes for Low Power Designs Using Multiple Supply Voltages.
J. Supercomput., 2006
Int. J. Comput. Intell. Appl., 2006
Support Vector Machine Based Automatic Classification of Human Brain Using MR Image Features.
Int. J. Comput. Intell. Appl., 2006
Functional Decomposition - the Value and Implication for Both Neural Networks and Digital Designing.
Int. J. Comput. Intell. Appl., 2006
Multilevel Synthesis of Finite State Machines Based on Symbolic Functional Decomposition.
Int. J. Comput. Intell. Appl., 2006
2005
J. Syst. Archit., 2005
An application of functional decomposition in ROM-based FSM implementation in FPGA devices.
J. Syst. Archit., 2005
J. Syst. Archit., 2005
Multiple voltage synthesis scheme for low power design under timing and resource constraints.
Integr. Comput. Aided Eng., 2005
Efficient Application of Modern Logic Synthesis in FPGA-Based Designing of Information and Signal Processing Systems.
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005
Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
2004
Synthesis Scheme for Low Power Designs with Multiple Supply Voltages by Heuristic Algorithms.
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004
Synthesis scheme for low power designs with multiple supply voltages by tabu search.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A Hybrid Approach to a Classification Problem.
Proceedings of the Intelligent Information Processing and Web Mining, 2004
Efficient Method of Input Variable Partitioning in Functional Decomposition Based on Evolutionary Algorithms.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
2003
Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003
A Scheduling and Partitioning Scheme for Low Power Circuit Operating at Multiple Voltages.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
NOAH, a tool for argument reduction, serial and parallel decomposition of decision tables.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
2002
Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002
FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition.
Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002
2001
Functional Decomposition and Its Applications in Machine Learning and Neural Networks.
Int. J. Comput. Intell. Appl., 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
Decomposition of Boolean Relations and Functions in Logic Synthesis and Data Analysis.
Proceedings of the Rough Sets and Current Trends in Computing, 2000
An Improved Column Compatibility Approach for Partition Based Functional Decomposition.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
1999
Proceedings of the International Joint Conference Neural Networks, 1999
1998
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998
Proceedings of the 24th EUROMICRO '98 Conference, 1998
1995
A General Approach to Boolean Function Decomposition and its Application in FPGABased Synthesis.
VLSI Design, 1995
Proceedings of the 1995 European Design and Test Conference, 1995