Henry Block
According to our database1,
Henry Block
authored at least 5 papers
between 2013 and 2017.
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Bibliography
2017
FPGA Hardware Acceleration of a Phylogenetic Tree Reconstruction with Maximum Parsimony Algorithm.
IEICE Trans. Inf. Syst., 2017
An FPGA hardware implementation approach for a phylogenetic tree reconstruction algorithm with incremental tree optimization.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
2015
An FPGA implementation of a phylogenetic tree reconstruction algorithm using an alternative second-pass optimization.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015
2014
An FPGA hardware acceleration of the indirect calculation of tree lengths method for phylogenetic tree reconstruction.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
2013
A hardware acceleration of a phylogenetic tree reconstruction with maximum parsimony algorithm using FPGA.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013