Henrik Fredriksson

Orcid: 0009-0007-0868-9868

According to our database1, Henrik Fredriksson authored at least 14 papers between 2003 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Data-Driven Modeling of Transportation Systems: Methodological Approaches and Real World Applications.
PhD thesis, 2024

2023
A Median-Based Misery Index for Travel Time Reliability.
Proceedings of the 14th International Conference on Ambient Systems, 2023

2021
Optimal Allocation of Charging Stations for Electric Vehicles Using Probabilistic Route Selection.
Comput. Informatics, 2021

Modeling of road traffic flows in the neighboring regions.
Proceedings of the 12th International Conference on Emerging Ubiquitous Systems and Pervasive Networks (EUSPN 2021) / The 11th International Conference on Current and Future Trends of Information and Communication Technologies in Healthcare (ICTH-2021), 2021

2020
Significant Route Identification using Daily 24-hour Traffic Flows.
Proceedings of the 23rd IEEE International Conference on Intelligent Transportation Systems, 2020

Traffic data collection using active mobile and stationary devices.
Proceedings of the 11th International Conference on Emerging Ubiquitous Systems and Pervasive Networks (EUSPN 2020) / The 10th International Conference on Current and Future Trends of Information and Communication Technologies in Healthcare (ICTH-2020) / Affiliated Workshops, 2020

2019
Optimal placement of Charging Stations for Electric Vehicles in large-scale Transportation Networks.
Proceedings of the 10th International Conference on Emerging Ubiquitous Systems and Pervasive Networks (EUSPN 2019) / The 9th International Conference on Current and Future Trends of Information and Communication Technologies in Healthcare (ICTH-2019) / Affiliated Workshops, 2019

2011

2008
Improvement Potential andEqualization Circuit Solutions forMulti-drop DRAM Memory Buses.
PhD thesis, 2008

2.6 Gb/s over a four-drop bus using an adaptive 12-tap DFE.
Proceedings of the ESSCIRC 2008, 2008

2007
3-Gb/s, Single-ended Adaptive Equalization of Bidirectional Data over a Multi-drop Bus.
Proceedings of the International Symposium on System-on-Chip, 2007

2004
Mixed-signal DFE for multi-drop, gb/s, memory buses - a feasibility study.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies.
Proceedings of the Integrated Circuit and System Design, 2004

2003
Verification of a blind mismatch error equalization method for randomly interleaved ADCs using a 2.5V/12b/30MSs PSAADC.
Proceedings of the ESSCIRC 2003, 2003


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