Henri Lunnikivi

According to our database, Henri Lunnikivi authored at least 9 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Keelhaul: Processor-Driven Chip Connectivity and Memory Map Metadata Validator for Large Systems-on-Chip.

Henri Lunnikivi, Roni Hämäläinen, Timo D. Hämäläinen

IEEE Trans. Very Large Scale Integr. Syst., December, 2024

Towards modularity of the Rust RTIC real-time scheduling framework.

Zakaria Madaoui, Henri Lunnikivi, Pawel Dzialo, Per Lindgren

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems.

Antti Nurmi, Per Lindgren, Abdesattar Kalache, Henri Lunnikivi, Timo D. Hämäläinen

Proceedings of the Architecture of Computing Systems - 37th International Conference, 2024

2023

Memory Mapped I/O Register Test Case Generator for Large Systems-on-Chip.

Roni Hämäläinen, Henri Lunnikivi, Timo Hämäläinen

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

Hardware support for Static-Priority Stack Resource Policy based scheduling.

Per Lindgren, Pawel Dzialo, Henri Lunnikivi

Proceedings of the 32nd IEEE International Symposium on Industrial Electronics, 2023

2022

A Resilient System Design to Boot a RISC-V MPSoC.

Antti Nurmi, Antti Rautakoura, Henri Lunnikivi, Timo D. Hämäläinen

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2020

Transpiling Python to Rust for Optimized Performance.

Henri Lunnikivi, Kai Jylkkä, Timo Hämäläinen

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

2019

Comparing Optimization Methods of Neural Networks for Real-time Inference.

Mir Khan, Henri Lunnikivi, Heikki Huttunen, Jani Boutellier

Proceedings of the 27th European Signal Processing Conference, 2019

2018

Design Flow for Portable Dataflow Programming of Heterogeneous Platforms.

Jani Boutellier, Henri Lunnikivi

Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018