Henk Neefs

According to our database1, Henk Neefs authored at least 10 papers between 1994 and 2000.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2000
Early design stage exploration of fixed-length block structured architectures.
J. Syst. Archit., 2000

Performance analysis through synthetic trace generation.
Proceedings of the 2000 IEEE International Symposium on Performance Analysis of Systems and Software, 2000

A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks.
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000

On the Feasibility of Fixed-Length Block Structured Architectures.
Proceedings of the 5th Australasian Computer Architecture Conference (ACAC 2000), 31 January, 2000

1999
Exploitable levels of ILP in future processors.
J. Syst. Archit., 1999

Increasing the efficiency of value prediction in future processors by predicting less.
Proceedings of the Parallel Computing: Fundamentals & Applications, 1999

Estimating IPC of a block structured instruction set architecture in an early design stage.
Proceedings of the Parallel Computing: Fundamentals & Applications, 1999

Investigating the Implementation of a Block Structured Architecture in an Early Design Stage.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
ESCAPE: environment for the simulation of computer architectures for the purpose of education.
Proceedings of the 1998 workshop on Computer architecture education, 1998

1994
An Optoelectronic 3-D Field Programmable Gate Array.
Proceedings of the Field-Programmable Logic, 1994


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