Heng Yu

Orcid: 0000-0002-0305-2135

Affiliations:
  • University of Nottingham Ningbo China, Ningbo, China


According to our database1, Heng Yu authored at least 34 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A scenario-customizable and visual-rendering simulator for on-vehicle vibration energy harvesting.
Sustain. Comput. Informatics Syst., 2024

Regression Residual Reasoning with Pseudo-labeled Contrastive Learning for Uncovering Multiple Complex Compositional Relations.
Proceedings of the Thirty-Third International Joint Conference on Artificial Intelligence, 2024

2023
Criticality-Aware Negotiation-Driven Scrubbing Scheduling for Reliability Maximization in SRAM-Based FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Region-aware RGB and near-infrared image fusion.
Pattern Recognit., October, 2023

AOS: An Automated Overclocking System for High-Performance CNN Accelerator Through Timing Delay Measurement on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

A High-Throughput Full-Dataflow MobileNetv2 Accelerator on Edge FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

GAN-in-GAN for Monaural Speech Enhancement.
IEEE Signal Process. Lett., 2023

NORB: A Stream-Based and Non-Blocking FPGA Accelerator for ORB Feature Extraction.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Data Partition Optimization for High Energy Efficiency by Decoupling Local Dependence in Holographic Video Decoder.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
FODM: A Framework for Accurate Online Delay Measurement Supporting All Timing Paths in FPGA.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Quality Optimization of Adaptive Applications via Deep Reinforcement Learning in Energy Harvesting Edge Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Dynamic Texture Recognition Using PDV Hashing and Dictionary Learning on Multi-Scale Volume Local Binary Pattern.
Proceedings of the IEEE International Conference on Acoustics, 2022

Efficient and Accurate Feature Extraction Using Local Density Detector.
Proceedings of the 5th International Conference on Artificial Intelligence and Pattern Recognition, 2022

2021
DVFS-Based Quality Maximization for Adaptive Applications With Diminishing Return.
IEEE Trans. Computers, 2021

CLIF: Cross-Layer Information Fusion for Stereo Matching and its Hardware Implementation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

TAIT: One-Shot Full-Integer Lightweight DNN Quantization via Tunable Activation Imbalance Transfer.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Quality Estimation and Optimization of Adaptive Stereo Matching Algorithms for Smart Vehicles.
ACM Trans. Embed. Comput. Syst., 2020

The impact of language on retweeting during acute natural disasters: uncertainty reduction and language expectancy perspectives.
Ind. Manag. Data Syst., 2020

An Accurate FPGA Online Delay Monitor Supporting All Timing Paths.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

DVFS-Based Scrubbing Scheduling for Reliability Maximization on Parallel Tasks in SRAM-based FPGAs.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Enabling Fine-Grained Dynamic Voltage and Frequency Scaling in SDSoC.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

Energy Efficiency Optimization of FPGA-based CNN Accelerators with Full Data Reuse and VFS.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2017
Benchmarking of Recommendation Trust Computation for Trust/Trustworthiness Estimation in HDNs.
Int. J. Comput. Commun. Control, 2017

Quality Optimization of Resilient Applications under Temperature Constraints.
Proceedings of the Computing Frontiers Conference, 2017

2014
Thermal-aware frequency scaling for adaptive workloads on heterogeneous MPSoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Quality-Driven Dynamic Scheduling for Real-Time Adaptive Applications on Multiprocessor Systems.
IEEE Trans. Computers, 2013

The architecture and placement algorithm for a uni-directional routing based 3D FPGA.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Dynamic Scheduling of Imprecise-Computation Tasks on Real-Time Embedded Multiprocessors.
Proceedings of the 16th IEEE International Conference on Computational Science and Engineering, 2013

2012
Cross-Level Compositional Reliability Analysis for Embedded Systems.
Proceedings of the Computer Safety, Reliability, and Security, 2012

2010
Communication-aware application mapping and scheduling for NoC-based MPSoCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Leakage-aware dynamic scheduling for real-time adaptive applications on multiprocessor systems.
Proceedings of the 47th Design Automation Conference, 2010

2009
A Multi-Application Mapping Framework for Network-on-Chip Based MPSoC: An FPGA Implementation Case Study.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

2008
Tighter WCET analysis of input dependent programs with classified-cache memory architecture.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Dynamic scheduling of imprecise-computation tasks in maximizing QoS under energy constraints for embedded systems.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008


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